Datasheet

AD9523 Data Sheet
Rev. C | Page 50 of 60
Address Bits Bit Name Description
1 Calibrate VCO (not
autoclearing)
1: initiates VCO calibration (this is not an autoclearing bit).
0: resets the VCO calibration.
0 Reserved Reserved.
Table 49. VCO Divider Control
Address Bits Bit Name Description
0x0F4 [7:4] Reserved Reserved.
3 VCO divider power-down 1: powers down the divider.
0: normal operation.
[2:0] VCO divider Note that the VCO divider connects to all output channels.
Bit 2 Bit 1 Bit 0 Divider Value
0 0 0 Divide-by-4
0 0 1 Divide-by-5
0 1 0 Divide-by-6
0 1 1 Divide-by-7
1 0 0 Divide-by-8
1 0 1 Divide-by-9
1 1 0 Divide-by-10
1
1
1
Divide-by-11
Table 50. PLL2 Loop Filter Control
Address Bits Bit Name Description
0x0F5
[7:6]
Pole 2 resistor (R
POLE2
)
Bit 7 Bit 6
R
POLE2
(Ω)
0 0 900
0 1 450
1 0 300
1 1 225
[5:3] Zero resistor (R
ZERO
)
Bit 5 Bit 4 Bit 3
R
ZERO
(Ω)
0 0 0 3250
0 0 1 2750
0 1 0 2250
0 1 1 2100
1 0 0 3000
1 0 1 2500
1 1 0 2000
1 1 1 1850
[2:0] Pole 1 capacitor (C
POLE1
)
Bit 2 Bit 1 Bit 0
C
POLE1
(pF)
0 0 0 0
0 0 1 8
0
1
0
16
0 1 1 24
1 0 0 24
1
0
1
32
1 1 0 40
1 1 1 48
0x0F6 [7:1] Reserved Reserved.
0 Bypass internal R
ZERO
resistor
Bypasses the internal R
ZERO
resistor (R
ZERO
= 0 Ω). Requires the use of a series external zero
resistor. This bit is the MSB of the loop filter control register (Address 0x0F5 and Address 0x0F6).