Datasheet

Data Sheet AD9577
Rev. 0 | Page 15 of 44
CRYSTAL OSCILLATOR
Table 10.
Parameter Min Typ Max Unit Test Conditions/Comments
CRYSTAL SPECIFICATION Fundamental mode
Frequency 19.44 25 27 MHz Reference divider, R = 1, only
ESR 50 Ω
Load Capacitance 14 pF
Phase Noise −135 dBc/Hz 1 kHz offset
Stability −50 +50 ppm
REFERENCE INPUT
Table 11.
Parameter Min Typ Max Unit Test Conditions/Comments
CLOCK INPUT (REFCLK)
Input Frequency 19.44 25 27 MHz Reference divider, R = 1
38.88 50 54 MHz Reference divider, R = 2
Input High Voltage 2.0 V
Input Low Voltage 0.8 V
Input Current −1.0 +1.0 μA
Input Capacitance 2 pF
CONTROL PINS
Table 12.
Parameter Min Typ Max Unit Test Conditions/Comments
INPUT CHARACTERISTICS
SSCG, MAX_BW, and MARGIN
SSCG, MAX_BW, and MARGIN have a 30 kΩ internal
pull-down resistor
Logic 1 Voltage 2.0 V
Logic 0 Voltage 0.8 V
Logic 1 Current 240 μA
Logic 0 Current 40 μA
REFSEL REFSEL has a 30 kΩ internal pull-up resistor
Logic 1 Voltage 2.0 V
Logic 0 Voltage 0.8 V
Logic 1 Current 70 μA
Logic 0 Current 240 μA
I
2
C DC CHARACTERISTICS LVCMOS; the SCL and SDA pins only, see Figure 48
Input Voltage High 0.7 Vcc V
Input Voltage Low 0.3 Vcc V
Input Current −10 +10 μA V
IN
= 0.1 V
CC
or V
IN
= 0.9 V
CC
Output Low Voltage 0.4 V V
OL
with a load current of I
OL
= 3.0 mA
I
2
C TIMING CHARACTERISTICS LVCMOS; the SCL and SDA pins only, see Figure 48
SCL Clock Frequency 400 kHz
SCL Pulse Width High
High, t
HIGH
600 ns
Low, t
LOW
1300 ns
Start Condition
Hold Time, t
HD; STA
600 ns
Setup Time, t
SU; STA
600 ns
Data
Setup Time, t
SU; DAT
100 ns
Hold Time, t
HD; DAT
300 ns
Stop Condition Setup Time, t
SU; STO
600 ns
Bus Free Time Between a Stop and a Start, t
BUF
1300 ns