User guide

2.2 Register roles and names

The ATPCS specifies the registers to use for particular purposes.

2.2.1 Register roles

The following register usage applies in all variants of the ATPCS except where otherwise stated. To comply with the

ATPCS you must follow these rules:

• Use registers r0-r3 to pass parameter values into routines, and to pass result values out. You can refer to r0-r3

as a1-a4 to make this usage apparent. See Parameter passing. Between subroutine calls you can use r0-r3 for

any purpose. A called routine does not have to restore r0-r3 before returning. A calling routine must preserve

the contents of r0-r3 if it needs them again.

• Use registers r4-r11 to hold the values of a routine's local variables. You can refer to them as v1-v8 to make this

usage apparent. In Thumb state, in most instructions you can only use registers r4-r7 for local variables.

A called routine must restore the values of these registers before returning, if it has used them.

• Register r12 is the intra-call scratch register, ip. It is used in this role in procedure linkage veneers, for example

interworking veneers. Between procedure calls you can use it for any purpose. A called routine does not need to

restore r12 before returning.

• Register r13 is the stack pointer, sp. You must not use it for any other purpose. The value held in sp on exit

from a called routine must be the same as it was on entry.

• Register r14 is the link register, lr. If you save the return address, you can use r14 for other purposes between

calls.

• Register r15 is the program counter, pc. It cannot be used for any other purpose.

2.2.2 Register names

Table 2-1 lists the defined roles of the processor registers, and associated names. These names and their synonyms

are predefined in the assembler. The compiler uses the special names and the basic register names when

generating assembler language.

Table 2-1 Register roles and names in ATPCS

r15 - pc Program counter.

r14 - lr Link register.

r13 - sp Stack pointer.

r12 - ip Intra-procedure-call scratch register.

r11 v8 - ARM-state variable register 8.

r10 v7 sl ARM-state variable register 7. Stack limit

pointer in stack-checked variants.

r9 v6 sb ARM-state variable register 6. Static base

in RWPI variants.

r8 v5 - ARM-state variable register 5.

r7 v4 - Variable register 4.

r6 v3 - Variable register 3.

r5 v2 - Variable register 2.

r4 v1 - Variable register 1.

r3 a4 - Argument/result/scratch register 4.

r2 a3 - Argument/result/scratch register 3.

r1 a2 - Argument/result/scratch register 2.

r0 a1 - Argument/result/scratch register 1.

In addition, s0-s31, d0-d15, and f0-f31 are predefined names for registers in floating-point coprocessors. See The

VFP architecture and The FPA architecture for more information.

Using the Procedure Call Standard