User guide

3.2 Assembly language interworking
In an assembly language source file, you can have several areas (these correspond to ELF sections). Each area can
contain ARM instructions, Thumb instructions, or both.
You can use the linker to fix up calls to, and returns from, routines that use a different instruction set from the caller.
To do this, use BL to call the routine (see Assembly language interworking using veneers).
If you prefer, you can write your code to make the instruction set changes explicitly. In some circumstances you can
write smaller or faster code by doing this.
The following instructions perform the processor state changes:
• BX, see The branch and exchange instruction
• BLX, LDR, LDM, and POP (ARM architecture v5 and above only), see ARM architecture v5T.
The following directives instruct the assembler to assemble instructions from the appropriate instruction set (see
Changing the assembler mode):
• CODE16
• CODE32.
3.2.1 The branch and exchange instruction
The BX instruction branches to the address contained in a specified register. The value of bit 0 of the branch address
determines whether execution continues in ARM state or Thumb state. See ARM architecture v5T for additional
instructions available with ARM architecture v5.
Bit 0 of an address can be used in this way because:
• all ARM instructions are word-aligned, so bits 0 and 1 of the address of any ARM instruction are unused
• all Thumb instructions are halfword-aligned, so bit 0 of the address of any Thumb instruction is unused.
Syntax
The syntax of BX is one of:
Thumb
BX Rn
ARM
BX{cond} Rn
where:
Rn
Is a register in the range r0 to r15 that contains the address to branch to. The value of bit 0 in this
register determines the processor state:
— if bit 0 is set, the instructions at the branch address are executed in Thumb state
— if bit 0 is clear, the instructions at the branch address are executed in ARM state.
cond
Is an optional condition code. Only the ARM version of BX can be executed conditionally.
3.2.2 Changing the assembler mode
The ARM assembler can assemble both Thumb code and ARM code. By default, it assembles ARM code unless it is
invoked with the -16 option.
Because all Thumb-capable ARM processors start in ARM state, you must use the BX instruction to branch and
exchange to Thumb state, and then use the CODE16 directive to instruct the assembler to assemble Thumb
instructions. Use the corresponding CODE32 directive to instruct the assembler to return to assembling ARM
instructions.
Refer to the Assembler Guide
for more information on these directives.
3.2.3 Example ARM header
Example 3-2 contains four sections of code. The first implements a short header section of ARM code that changes
the processor to Thumb state.
The header code uses:
• An ADR pseudo-instruction to load the branch address and set the least significant bit. The ADR
pseudo-instruction generates the address by loading r0 with the value pc+offset+1. See Assembler Guide
for
more information on the ADR pseudo-instruction.
Interworking ARM and Thumb
Copyright ?1999 2001 ARM Limited 3-3