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5.2 Entering and leaving an exception

This section describes the processor response to an exception, and how to return to the place where an exception

occurred after the exception has been handled. The method for returning is different depending on the exception

type.

5.2.1 The processor response to an exception

When an exception is generated, the processor takes the following actions:

1. Copies the Current Program Status Register (CPSR) into the Saved Program Status Register (SPSR) for the

mode in which the exception is to be handled. This saves the current mode, interrupt mask, and condition flags.

2. Changes the appropriate CPSR mode bits in order to:

• Change to the appropriate mode, and map in the appropriate banked registers for that mode.

• Disable interrupts. IRQs are disabled when any exception occurs. FIQs are disabled when a FIQ occurs,

and on reset.

3. Sets lr_mode to the return address, as defined in The return address and return instruction.

4. Sets the program counter to the vector address for the exception. This forces a branch to the appropriate

exception handler.

Note

If the application is running on a Thumb-capable processor, the processor response is slightly different. See

Handling exceptions on Thumb-capable processors for more details.

5.2.2 Returning from an exception handler

The method used to return from an exception depends on whether the exception handler uses stack operations or

not. In both cases, to return execution to the place where the exception occurred an exception handler must:

• restore the CPSR from spsr_mode

• restore the program counter using the return address stored in lr_mode.

For a simple return that does not require the destination mode registers to be restored from the stack, the exception

handler carries out these two operations by performing a data processing instruction with:

• the S flag set

• the program counter as the destination register.

The return instruction required depends on the type of exception. See The return address and return instruction for

instructions on how to return from each exception type.

Note

You do not need to return from the reset handler because the reset handler should execute your main code directly.

If the exception handler entry code uses the stack to store registers that must be preserved while it handles the

exception, it can return using a load multiple instruction with the ^ qualifier. For example, an exception handler can

return in one instruction using:

LDMFD sp!,{r0-r12,pc}^

if it saves the following onto the stack:

• all the work registers in use when the handler is invoked

• the link register, modified to produce the same effect as the data processing instructions described below.

The ^ qualifier specifies that the CPSR is restored from the SPSR. It must be used only from a privileged mode. See

the description of Implementing stacks with LDM and STM in the Assembler Guide

for more general information on

stack operations.

5.2.3 The return address and return instruction

The actual location pointed to by the program counter when an exception is taken depends on the exception type.

The return address may not necessarily be the next instruction pointed to by the program counter. This section

details the instructions to return correctly from handling code for each type of exception.

Note

See The return address for details of the return address on Thumb-capable processors when an exception occurs in

Thumb state.

Handling Processor Exceptions