User guide

return (oldvec);
}
#endif
/* Enabling and disabling interrupts
Interrupts are enabled or disabled by reading the cpsr flags
and updating bit 7.
These functions work only in a privileged mode, because the
control bits of the cpsr and spsr cannot be changed while in
User mode.
*/
__inline void enable_IRQ(void)
{
int tmp;
__asm
{
MRS tmp, CPSR
BIC tmp, tmp, #0x80
MSR CPSR_c, tmp
}
}
__inline void disable_IRQ(void)
{
int tmp;
__asm
{
MRS tmp, CPSR
ORR tmp, tmp, #0x80
MSR CPSR_c, tmp
}
}
#ifdef EMBEDDED
extern void init_serial_A(void);
#endif
int main(void)
{
#ifdef EMBEDDED
#pragma import(__use_no_semihosting_swi) // ensure no functions that use
// semihosting SWIs are linked in
// from the C library
#ifdef USE_SERIAL_PORT
init_serial_A(); // Initialize serial port A
#endif
#endif
printf("RPS Timer Interrupt Example\n");
#ifdef EMBEDDED
#ifdef ROM_RAM_REMAP
printf("Embedded (ROM/RAM remap, no SWIs) version\n");
#else
printf("Embedded (ROM at 0x0, no SWIs) version\n");
#endif
#else
Install_Handler ((unsigned)IRQ_Handler, irqvec);
printf("Normal (RAM at 0x8000, semihosting) version\n\n");
#endif
printf("Initializing...\n");
enable_IRQ();
*IRQEnableClear = ~0; // Clear/disable all interrupts
*Timer1Control = 0; // Disable counters by clearing the control bytes
*Timer2Control = 0;
*Timer1Clear = 0 ; // Clear counter/timer interrupts by writing to
*Timer2Clear = 0 ; // the clear register - any data will work
*Timer1Load = FAST_LOAD; // Load counter values
Writing Code for ROM
Copyright ?1999 2001 ARM Limited 6-19