User Manual

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CLD0 VDDG IOD Voltage Control
AMD Overclocking Setup VDDG IOD represents voltage for the data portion of the Innity
Fabric. It is derived from the CPU SoC/Uncore Voltage (VDD_SOC). VDDG can approach
but not exceed VDD_SOC.
DRAM Information
Load XMP Setting
Load XMP settings to overclock the memory and perform beyond standard
specications.
DRAM Frequency
If [Auto] is selected, the motherboard will detect the memory module(s) inserted
and assign the appropriate frequency automatically. Setting DRAM Frequency can
adjust DRAM Timing.
Innity Fabric Frequency and Dividers
AMD Overclocking Setup Set Innity Fabric frequency (FCLK). Auto: FCLK =
MCLK. Manual: FCLK must be less than or equal to MCLK for best performance in
most cases. Latency penalties are incurred if FCLK and MCLK are mismatched, but
suciently high MCLK can negate or overcome this penalty.
DRAM Timing Conguration
External Voltage Settings and Load-line Calibration
+1.8V Voltage
Congure the voltage for the +1.8V Voltage. e default value is [Auto].
DRAM Voltage
Congure the voltage for the DRAM Voltage.
VDDP
Congure the voltage for the VDDP.
Save User Default
Type a prole name and press enter to save your settings as user default.