User's Manual

ROG RAMPAGE IV GENE 主板用戶手冊
3-9
第三章
DRAM COMMAND Mode [Auto]
設置值有：[Auto] [1 DRAM Clock] [2 DRAM Clock] [3 DRAM Clock]
Latency Boudary [Nearer]
設置值有：[Nearer] [Further]
Secondary Timings
DRAM RAS# to RAS# Delay [Auto]
設置值有：[Auto] [4 DRAM Clock] – [7 DRAM Clock]
DRAM REF Cycle Time [Auto]
設置值有：[Auto] [48 DRAM Clock] – [511 DRAM Clock]
DRAM WRITE Recovery Time [Auto]
設置值有：[Auto] [5 DRAM Clock] – [31 DRAM Clock]
DRAM READ to PRE Time [Auto]
設置值有：[Auto] [4 DRAM Clock] – [15 DRAM Clock]
DRAM FOUR ACT WIN Time [Auto]
設置值有：[Auto] [16 DRAM Clock] – [63 DRAM Clock]
DRAM WRITE to READ Delay [Auto]
設置值有：[Auto] [4 DRAM Clock] – [15 DRAM Clock]
DRAM Write Latency [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]
Third Timings
tRRDR [Auto]
設置值有：[Auto] [0 DRAM Clock] – [7 DRAM Clock]
tRRDD [Auto]
設置值有：[Auto] [0 DRAM Clock] – [7 DRAM Clock]
tWWDR [Auto]
設置值有：[Auto] [0 DRAM Clock] – [7 DRAM Clock]
tWWDD [Auto]
設置值有：[Auto] [0 DRAM Clock] – [7 DRAM Clock]
tRWDR [Auto]
設置值有：[Auto] [0 DRAM Clock] – [15 DRAM Clock]
tRWDD [Auto]
設置值有：[Auto] [0 DRAM Clock] – [15 DRAM Clock]
tWRDR [Auto]
設置值有：[Auto] [0 DRAM Clock] – [7 DRAM Clock]
tWRDD [Auto]
設置值有：[Auto] [0 DRAM Clock] – [7 DRAM Clock]