User's Manual

華碩 Z8NA-D6 系列主機板使用手冊
4-21
4.4.2 晶片組設定（Chipset）
本選單可讓您變更晶片組的進階設定，請選擇所需的項目並按 <Enter> 鍵
以顯示子選單項目。
CPU Bridge 晶片設定（CPU Bridge Configuration）
往下捲動以顯示更多項目。
v02.61 (C)Copyright 1985-2008, American Megatrends, Inc.
BIOS SETUP UTILITY
Advanced
Advanced Chipset Settings
WARNING: Setting wrong values in below sections
may cause system to malfunction.
 CPUBridgeConguration
 NorthBridgeConguration
 SouthBridgeConguration
 IntelVT-dConguration
←→ Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1 General Help
F10SaveandExit
ESCExit
CongureCPUBridge
features.
v02.61 (C)Copyright 1985-2008, American Megatrends, Inc.
Adaptive Page [Disabled]
Data Scramble [Enabled]
Split Below 4GB [Disabled]
Channel Interleaving [6:1]
RankInterleaving  [4:1]
←→ Select Screen
↑↓ Select Item
+- Change Option
F1 General Help
F10SaveandExit
ESCExit
v02.61 (C)Copyright 1985-2008, American Megatrends, Inc.
BIOS SETUP UTILITY
Advanced
CPUBridgeChipsetConguration
CPU Revision :B0
Current CSI Frequency :5.866GT
Current Memory Frequency :1066 Mhz
CSILinksSpeed  [Full-Speed]
CSI Frequency [Auto]
CSI Isochronous [Disabled]
CSI L0s [Disabled]
CSI L1 [Disabled]
Memory Frequency [Auto]
Memory Mode [Independent]
Memory ECC Function [Enabled]
Double Rate Refresh [Auto]
Demand Scrubbing [Enabled]
Patrol Scrubbing [Disabled]
NUMA Aware [Auto]
Page Policy [Closed]
←→ Select Screen
↑↓ Select Item
+- Change Option
F1 General Help
F10SaveandExit
ESCExit
To transition the CSI
linkstofull-speed
or leave them in
slow-mode.
v02.61 (C)Copyright 1985-2008, American Megatrends, Inc.
BIOS SETUP UTILITY
Advanced