Hardware manual

The 8051 Instruction Set
Atmel 8051 Microcontrollers Hardware Manual 1-7
4316A–8051–01/04
This means the stack can go into the Upper 128, if they are implemented, but not into
SFR space.
The Upper 128 are not implemented in the 8 standard 8051, nor in their ROMless. With
these devices, if the SP points to the Upper 128 PUSHed bytes are lost, and POPped
bytes are indeterminate.
The Data Transfer instructions include a 16-bit MOV that can be used to initialize the
Data Pointer (DPTR) for look-up tables in Program Memory, or for 16-bit external Data
Memory accesses.
The XCH A, <byte> instruction causes the Accumulator and addressed byte to
exchange data.
The XCHD A, @ Ri instruction is similar, but only the low nibbles are involved in the
exchange.
The see how XCH and XCHD can be used to facilitate data manipulations, consider first
the problem of shifting an 8-digit BCD number two digits to the right. Table 1-5 shows
how this can be done using direct MOVs, and for comparison how it can be done using
XCH instructions. To aid in understanding how the code works, the contents of the reg-
isters that are holding the BCD number and the content of the Accumulator are shown
alongside each instruction to indicate their status after the instruction has been
executed.
After the routine has been executed, the Accumulator contains the two digits that were
shifted out on the right. Performing the routine with direct MOVs uses 14 code bytes and
9 µs of execution time (assuming a 12 MHz clock and X1 mode). The same operation
with XCHs uses less code and executes almost twice as fast.
Table 1-4. Atmel 8051 Data Transfer Instructions that Access Internal Data Memory
Space
Mnemonic Operation
Addressing Modes
Execution Time
@ 12MHz (µs)
Dir Ind Reg Imm
MOV A, <src> A = <src> X X X X 1
MOV <dest>, A <dest> = A X X X 1
MOV <dest>,
<src>
<dest> = <src> X X X X 2
MOV DPTR, #
data 16
DPTR = 16-bit immediate
constant
X2
PUSH <src> INC SP: MOV “@SP”, <scr> X 2
POP <dest> MOV <dest>, “@SP”: DEC SP X 2
XCH A, <byte> ACC and <byte> Exchange Data X X X 1
XCHD A, @Ri
ACC and @ Ri exchange low
nibbles
X1