Hardware manual

Common Features Description

2-30 Atmel 8051 Microcontrollers Hardware Manual

4316A–8051–01/04

that purpose ALE is activated twice every machine cycle. This activation takes place

even when the cycle involves no external fetch. The only time an ALE pulse doesn’t

come out is during an access to external Data Memory. The first ALE of the second

cycle of a MOVX instructions is missing. The ALE disable mode, described in Section

2.8.2, disables the ALE output. Consequently, in any system that does not use external

Data Memory, ALE is activated at a constant rate of 1/6 the oscillator frequency, and

can be used for external clocking or timing purposes.

2.8.1 Overlapping

External Program

and Data Memory

Spaces

In some applications it is desirable to execute a program from the same physical mem-

ory that is being used to store data. In the 80C51, the external Program and Data

Memory spaces can be combined by ANDing PSEN

and RD. A positive-logic AND of these

two signals produces an active-low read strobe that can be used for the combined physical

memory. Since the PSEN

cycle is faster than the RD cycle, the external memory needs to be

fast enough to accommodate the PSEN

cycle.

2.8.2 ALE Disable Mode The ALE signal is used to demultiplex address and data buses on port 0 when used with

external program or data memory. Nevertheless, during internal code execution, ALE

signal is still generated.

In order to reduce EMI, ALE signal can be disabled by setting AO bit.

The AO bit is located in AUXR register at bit location 0 (See Table 2-3). As soon as AO

is set, ALE is no longer output but remains active during MOVX and MOVC instructions

and external fetches. During ALE disabling, ALE pin is weakly pulled high.

Table 2-3. AUXR Register

AUXR (S:8Eh)

Auxiliary Register

Reset Value = XXXX XX00b

76543210

------EXTRAMAO

Bit

Number

Bit

Mnemonic Description

Reserved