Hardware manual

Common Features Description
Atmel 8051 Microcontrollers Hardware Manual 2-33
4316A–8051–01/04
Figure 2-10. Timer/Counter x (x = 0 or 1) in Mode 1
2.10.3 Mode 2 (8-bit Timer
with Auto-Reload)
Mode 2 configures timer 0 as an 8-bit timer (TL0 register) that automatically reloads
from the TH0 register (see Table 2-6 on page 37). TL0 overflow sets TF0 flag in the
TCON register and reloads TL0 with the contents of TH0, which is preset by software.
When the interrupt request is serviced, hardware clears TF0. The reload leaves TH0
unchanged. The next reload value may be changed at any time by writing it to the TH0
register.
Mode 2 operation is the same for Timer/Counter 1.
Figure 2-11. Timer/Counter x (x = 0 or 1) in Mode 2
2.10.4 Mode 3 (Two 8-bit
Timers)
Mode 3 configures timer 0 so that registers TL0 and TH0 operate as separate 8-bit tim-
ers (see Figure 2-12). This mode is provided for applications requiring an additional 8-bit
timer or counter. TL0 uses the timer 0 control bits C/T0# and GATE0 in the TMOD regis-
ter, and TR0 and TF0 in the TCON register in the normal manner. TH0 is locked into a
timer function (counting F
PER
/6) and takes over use of the timer 1 interrupt (TF1) and
run control (TR1) bits. Thus, operation of timer 1 is restricted when timer 0 is in mode 3.
TRx
TCON reg
TFx
TCON reg
0
1
Overflow
Timer x
Interrupt
Request
C/Tx#
TMOD reg
TLx
(8 bits)
THx
(8 bits)
INTx#
Tx
PERIPH
CLOCK
÷ 6
GATE
TRx
TCON reg
TFx
TCON reg
0
1
Overflow
Timer x
Interrupt
Request
C/Tx#
TMOD reg
TLx
(8 bits)
THx
(8 bits)
INTx#
Tx
PERIPH
CLOCK
÷ 6
GATE