Hardware manual

Common Features Description
Atmel 8051 Microcontrollers Hardware Manual 2-55
4316A–8051–01/04
2.15 Automatic Address Recognition
2.15.1 Multiprocessor
Communications
Implemented in hardware, automatic address recognition enhances the multiprocessor
communication feature by allowing the serial port to examine the address of each
incoming command frame. Only when the serial port recognizes its own address, the
receiver sets RI bit in SCON register to generate an interrupt. This ensures that the CPU
is not interrupted by command frames addressed to other devices.
To support automatic address recognition, a device is identified by a given address and
a broadcast address.
Note: The multiprocessor communication and automatic address recognition features cannot
be enabled in mode 0 (i.e. setting SM2 bit in SCON register in mode 0 has no effect).
If desired, you may enable the automatic address recognition feature in mode 1. In this
configuration, the stop bit takes the place of the ninth data bit. Bit RI is set only when the
received command frame address matches the device’s address and is terminated by a
valid stop bit.
Modes 2 and 3 have a special provision for multiprocessor, communications. In these
modes, 9 data bits are received. The 9th one goes into RB8. Then comes a stop bit. The
port can be programmed such that when the stop bit is received, the serial port interrupt
will be activated only if RB8 = 1. This feature is enabled by setting bit SM2 in SCON. A
way to use this feature in multiprocessor systems is as follows.
When the master processor wants to transmit a block of data to one of several slaves, it
first sends out an address byte which identifies the target slave. An address byte differs
from a data byte in that the 9th bit is 1 in an address byte and 0 in a data byte. With SM2
= 1, no slave will be interrupt by a data byte. An address byte, however, will interrupt all
slaves, so that each slave can examine the received byte and see if it is being
addressed. The addressed slave will clear its SM2 bit and prepare to receive the data
bytes that will be coming. The slaves that weren’t being addressed leaved their SM2s
set and go on about their business, ignoring the coming data bytes.
SM2 has no effect in Mode 0, and in Mode 1 can be used to check the validity of the
stop bit. In a Mode 1 reception, if SM2 = 1, the receive interrupt will not be activated
unless a valid stop bit is received.
2.15.2 Given Address Each device has an individual address that is specified in SADDR register; the SADEN
register is a mask byte that contains don’t-care bits (defined by zeros) to form the
device’s given address. The don’t-care bits provide the flexibility to address one or more
slaves at a time. The following example illustrates how a given address is formed.
To address a device by its individual address, the SADEN mask byte must be 1111
1111b.
For example:
SADDR0101 0110b
SADEN
1111 1100b
Given0101 01XXb
The following is an example of how to use given addresses to address different slaves:
Slave A:SADDR1111 0001b
SADEN
1111 1010b
Given1111 0X0Xb
Slave B:SADDR1111 0011b
SADEN
1111 1001b
Given1111 0XX1b