Datasheet

ManualsBrandsBROADCOM ManualsOptoelectronics & DisplaysLogicGate Optocoupler DIP 8 Type (misc.) 15 MBd, 25 ns, 1-channel, 3.3 V

Description

The HCPL-260L/060L/263L/063L are optically coupled

gates that combine a GaAsP light emitting diode and

an integrated high gain photo detector. An enable in-

put allows the detector to be strobed. The output of

the detector IC is an open collector Schottky-clamped

transistor. The internal shield provides a guaranteed

common mode transient immunity specication of

15 kV/µs at 3.3V.

This unique design provides maximum AC and DC circuit

isolation while achieving LVTTL/LVCMOS compati-bil-

ity. The optocoupler AC and DC operational parameters

are guaranteed from –40°C to +85°C allowing trouble-

free system performance.

These optocouplers are suitable for high speed logic

interfacing, input/output buering, as line receivers in

environments that conventional line receivers cannot

tolerate and are recommended for use in extremely high

ground or induced noise environments.

Functional Diagram

Features

• 3.3V/5V Dual Supply Voltages

• Low power consumption

• 15 kV/µs minimum Common Mode Rejection (CMR) at

= 1000 V

• High speed: 15 MBd typical

• LVTTL/LVCMOS compatible

• Low input current capability: 5 mA

• Guaranteed AC and DC performance over tempera-

ture: –40°C to +85°C

• Available in 8-pin DIP, SOIC-8

• Strobable output (single channel products only)

• Safety approvals: UL, CSA, IEC/EN/DIN EN 60747-5-2

Applications

• Isolated line receiver

• Computer-peripheral interfaces

• Microprocessor system interfaces

• Digital isolation for A/D, D/A conversion

• Switching power supply

• Instrument input/output isolation

• Ground loop elimination

• Pulse transformer replacement

• Field buses

HCPL-260L/060L/263L/063L

High Speed LVTTL Compatible 3.3/5 Volt Optocouplers

Data Sheet

Lead (Pb) Free

RoHS 6 fully

compliant

RoHS 6 fully compliant options available;

-xxxE denotes a lead-free product

CATHODE

ANODE

GND

ANODE

CATHODE

ANODE

GND

HCPL-260L/060L

HCPL-263L/063L

LED

OFF

ENABLE

OUTPUT

TRUTH TABLE

(POSITIVE LOGIC)

LED

OFF

OUTPUT

TRUTH TABLE

(POSITIVE LOGIC)

SHIELD SHIELD

A 0.1 µF bypass capacitor must be

connected between pins 5 and 8.

CAUTION: It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and/or degradation which may be induced by ESD.

Summary of content (20 pages)

PAGE 1
HCPL-260L/060L/263L/063L High Speed LVTTL Compatible 3.3/5 Volt Optocouplers Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product Description Features The HCPL-260L/060L/263L/063L are optically coupled gates that combine a GaAsP light emitting diode and an integrated high gain photo detector. An enable input allows the detector to be strobed. The output of the detector IC is an open collector Schottky-clamped transistor.
PAGE 2
Ordering Information HCPL-xxxx is UL Recognized with 3750 Vrms for 1 minute per UL1577 Option Part number HCPL-260L HCPl-263L HCPL-060L HCPL-063L RoHS Compliant Non RoHS Compliant -000E No option -300E -300 X X -500E #500 X X -020E -020 -320E -320 -520E -520 -060E #060 -560E #560 -000E No option -300E Package Surface Mount Gull Wing 300mil DIP-8 X X X X X #300 X X -500E #500 X X -020E #020 -320 -520E #520 -060E -060 UL 5000 Vrms/ 1 IEC/EN/DIN Minute rating
PAGE 3
Schematic HCPL-260L/060L IF HCPL-263L/063L ICC 8 2+ IO 6 VF VCC VO 1 ICC 8 IF1 IO1 + 7 VF1 VCC VO1 – – 3 SHIELD IE 5 7 GND 2 SHIELD 3 VE IO2 – USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 5). 6 VF2 VO2 + 4 IF2 SHIELD 5 HCPL-260L Schematic a HCPL-260L Schematic b Package Outline Drawings 8-Pin DIP Package 7.62 ± 0.25 (0.300 ± 0.010) 9.65 ± 0.25 (0.380 ± 0.010) TYPE NUMBER 8 7 6 5 OPTION CODE* 6.35 ± 0.25 (0.250 ± 0.
PAGE 4
8-Pin DIP Package with Gull Wing Surface Mount in Option 500 (HCPL-260L, HCPL-263L) LAND PATTERN RECOMMENDATION 9.65 ± 0.25 (0.380 ± 0.010) 6 7 8 1.016 (0.040) 5 6.350 ± 0.25 (0.250 ± 0.010) 1 3 2 10.9 (0.430) 4 2.0 (0.080) 1.27 (0.050) 9.65 ± 0.25 (0.380 ± 0.010) 1.780 (0.070) MAX. 1.19 (0.047) MAX. 7.62 ± 0.25 (0.300 ± 0.010) + 0.076 0.254 – 0.051 + 0.003 (0.010 – 0.002) 3.56 ± 0.13 (0.140 ± 0.005) 1.080 ± 0.320 (0.043 ± 0.013) 0.635 ± 0.130 (0.025 ± 0.005) 2.54 (0.100) BSC 0.635 ± 0.
PAGE 5
Solder Reflow Temperature Profile 300 PREHEATING RATE 3°C + 1°C/–0.5°C/SEC. REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC. TEMPERATURE ( C) 200 PEAK TEMP. 245°C PEAK TEMP. 240°C 2.5 C ± 0.5 C/SEC. 30 SEC. 160 C 150 C 140 C SOLDERING TIME 200°C 30 SEC. 3 C + 1 C/–0.5 C 100 PREHEATING TIME 150 C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE ROOM TEMPERATURE 0 0 50 100 150 TIME (SECONDS) Note: Non-halide flux should be used.
PAGE 6
Regulatory Information The HCPL-260L/060L/263L/063L have been approved by the following organizations: UL Approval under UL 1577, Component Recognition Program, File E55361. CSA Approval under CSA Component Acceptance Notice #5, File CA 88324.
PAGE 7
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Description Symbol PDIP Option 060 SO-8 Option 060 Units Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 150 V rms for rated mains voltage ≤ 300 V rms I-IV for rated mains voltage ≤ 600 V rms I-III I-IV I-III I-II Climatic Classification 55/85/21 55/85/21 Pollution Degree (DIN VDE 0110/1.
PAGE 8
Absolute Maximum Ratings (No Derating Required up to 85˚C) Parameter Symbol Package** Min. Max. Units Storage Temperature TS –55 125 ˚C Operating Temperature† TA –40 85 ˚C mA Note Average Forward Input Current IF Single 8-Pin DIP Single SO-8 20 Dual 8-Pin DIP Dual SO-8 15 1, 3 8-Pin DIP, SO-8 1 Reverse Input Voltage VR 5 V Input Power Dissipation PI 40 mW Supply Voltage (1 Minute Maximum) VCC 7 V VCC + 0.
PAGE 9
Electrical Specifications Over Recommended Operating Conditions (TA = –40°C to +85°C , 2.7V ≤ VCC ≤ 3.6V) unless otherwise specified. All Typicals at VCC = 3.3 V, TA = 25°C. All enable test conditions apply to single channel products only. See Note 5. Test Conditions Fig. Note High Level IOH* 4.5 50 µA Output Current Parameter VCC = 3.3 V, VE = 2.0 V, VO = 3.3 V, IF = 250 µA 1 1, 15 3.0 5.0 mA Input Threshold ITH Current VCC = 3.3 V, VE = 2.0 V, VO = 0.
PAGE 10
Electrical Specifications (DC) Over recommended operating conditions (TA = -40°C to +85°C, 4.5V ≤ VDD ≤ 5.5V) unless otherwise specified. All typicals at VCC = 5 V, TA = 25 °C. Parameter Symbol High Level Output Current IOH Input Threshold Current ITH Low Level Output Voltage VOL High Level Supply Current ICCH Channel Min. Typ.* Max. Units Test Conditions Fig. Note 5.5 100 mA VCC = 5.5 V, VO = 5.5 V, IFL = 250 mA 1 1,15 Single 2.0 5.0 mA 2 15 Dual 2.5 VCC = 5.5 V, VO = 0.
PAGE 11
Switching Specifications Over Recommended Operating Conditions (TA = –40°C to +85°C, 2.7V ≤ VCC ≤ 3.6V), IF = 7.5 mA unless otherwise specified. All Typicals at TA = 25°C, VCC = 3.3 V. Parameter Symbol Propagation Delay Time to High Output Level Min. Typ. Max. Units Test Conditions Fig.
PAGE 12
Parameter Sym. Device Min. Typ. Units Test Conditions Fig. Note Output High Level Common Mode Transient Immunity |CMH| HCPL-263L HCPL-063L HCPL-260L HCPL-060L 15 25 kV/ms VCC = 3.3 V, IF = 0 mA, VO(MIN) = 2 V, RL = 350 W, TA = 25°C, VCM = 1000 V and VCM = 10V 10 12, 14, 15 Output Low Level Common Mode Transient Immunity |CML| HCPL-263L HCPL-063L HCPL-260L HCPL-060L 15 25 kV/ms VCC = 3.3 V, IF = 7.5 mA, VO(MAX) = 0.
PAGE 13
Package Characteristics All Typicals at TA = 25˚C. Parameter Sym. Package Input-Output II-O* Insulation Min. Typ. Max Units Single 8-Pin DIP 1 µA Single SO-8 8-Pin DIP, SO-8 3750 V rms Input-Output VISO Momentary Withstand Voltage** Test Conditions Fig.
PAGE 14
VCC = 3.3 V VO = 3.3 V VE = 2.0 V* IF = 250 µA 10 * FOR SINGLE CHANNEL PRODUCTS ONLY 5 0 -60 -40 -20 0 20 40 60 80 100 IOH – HIGH LEVEL OUTPUT CURRENT – µA IOH – HIGH LEVEL OUTPUT CURRENT – µA 15 15 VCC = 5.5 V VO = 5.5 V VE = 2.0 V* IF = 250 µA 10 * FOR SINGLE CHANNEL PRODUCTS ONLY 5 0 -60 -40 -20 TA – TEMPERATURE – C 0 20 40 60 80 100 TA – TEMPERATURE – C Figure 1. Typical high level output current vs. temperature. 12 10 6N137 fig 1 8-PIN DIP, SO-8 VCC = 3.3 V VO = 0.
PAGE 15
60 VCC = 3.3 V VE = 2.0 V* VOL = 0.6 V IOL – LOW LEVEL OUTPUT CURRENT – mA IOL – LOW LEVEL OUTPUT CURRENT – mA 70 * FOR SINGLE CHANNEL PRODUCTS ONLY 50 IF = 5.0 mA 40 20 -60 -40 -20 0 20 40 80 100 60 70 VCC = 5.0 V VE = 2.0 V* VOL = 0.6 V * FOR SINGLE CHANNEL PRODUCTS ONLY 60 IF = 10-15 mA 50 IF = 5.0 mA 40 20 -60 -40 -20 TA – TEMPERATURE – C 0 20 40 60 80 100 TA – TEMPERATURE – C Figure 4. Typical low level output current vs. temperature.
PAGE 16
120 90 100 VCC = 3.3 V IF = 7.5 mA tP - PROPAGATION DELAY - ns tP – PROPAGATION DELAY – ns 150 tPLH , RL = 350 Ω 60 30 tPHL , RL = 350 Ω 0 -60 -40 -20 0 20 40 60 VCC = 5.0 V IF = 7.5 mA 80 tPLH , RL = 4 KΩ tPHL , RL = 350 Ω 1 KΩ 60 4 KΩ tPLH , RL = 1 KΩ 40 20 tPLH , RL = 350 Ω 0 -60 -40 -20 80 100 TA – TEMPERATURE – C 0 20 40 80 100 60 TA - TEMPERATURE - ¡C 50 40 HCPL-260L fig 8 VCC = 3.3 V IF = 7.
PAGE 17
PULSE GEN. ZO = 50 Ω tf = tr = 5 ns INPUT VE MONITORING NODE 3.3V or 5V 7.5 mA IF 1 VCC 8 2 7 3 6 4 5 0.1 µF BYPASS RL OUTPUT VO MONITORING NODE *CL GND 3.0 V INPUT VE 1.5 V tEHL tELH OUTPUT VO 1.5 V *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. Figure 9. Test circuit for tEHL and tELH. IF SINGLE CHANNEL IF 1 3.3V or 5V HCPL-260L fig 9 0.
PAGE 18
SINGLE CHANNEL DEVICE VCC1 3.3 V or 5V 3.3 V or 5V VCC2 8 220 Ω RL IF + D1* 2 6 VF – GND 1 0.1 µF BYPASS 3 5 SHIELD GND 2 VE 7 1 2 *DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT. DUAL CHANNEL DEVICE CHANNEL 1 SHOWN VCC1 3.3 V or 5V 220 Ω IF + D1* RL 1 7 0.1 µF BYPASS VF – GND 1 2 SHIELD 1 Figure 12. Recommended LVTTL interface circuit. 18 3.
PAGE 19
Application Information Common-Mode Rejection for HCPL-260L Families: Also, common-mode transients can capacitively couple from the LED anode (or cathode) to the output-side ground causing current to be shunted away from the LED (which can be bad if the LED is on) or conversely cause current to be injected into the LED (bad if the LED is meant to be off ). Figure 14 shows the parasitic capacitances which exists between LED anode/cathode and output ground (CLA and CLC).
PAGE 20
Likewise for common-mode transients which occur when the LED is off (i.e. CMRH, since the output is “high”), if an imbalance between ILP and ILN results in a transient IF equal to or greater than the switching threshold of the optocoupler, the transient “signal” may cause the output to spike below 2 V (which constitutes a CMRH failure). By using the recommended circuit in Figure 13, good CMR can be achieved.