Specifications

Table Of Contents
Cinterion
®
EXS62-W/EXS82-W Hardware Interface Description
1.4 Circuit Concept
15
t EXS62-W_EXS82-W_HID_v01.200ee 2022-09-07
Public/ Released
Page 14 of 144
1.4 Circuit Concept
Figure 3 and Figure 3 show block diagrams for the EXSx2-W module variants, and illustrate
the major functional components:
Figure 2: EXS62-W ResM block diagram
19.2MHz
32.768kHz
19.2MHz
with
Temp.Sensor
X-tal:
Control interface
Reset
HWID’s
GPIO’s
GNSS
GSM/
LTE
Antenna LGA Pads
LGA Pads
GSM/CatM1/CatNB
Baseband controller
with integrated memory
ADC
RF
Interrupt
BATT+_RF
RF Transceiver
LTE PA+ASM
BATT+_RF
3
4
Power Management
IC
Power Supply
Power Supply
Serial (ASC0)
Serial (ASC1/GPIO)
USB 2.0
USIM
CCIN
FST_SHDN
STATUS (GPIO)
SUSPEND_MON
SIM_SWITCH (GPIO)
GPIO ( not shared)
I
2
C
SPI (GPIO)
VUSIM
ADC1
EMERG_RST
ON
V180
VCORE
BATT+
RF
BATT+
BB
eUICC (option)
8
I/Q-sig nals
(2x2)
SDR_ASM _ANT
RF_CLK1
SDR_GNSS
GSMPA +ASM
BATT+
PS_HOLD
REFE 1... 2_
CLK_DATA
4
GPDATA
STMR_SYNC
BATT +
IN
EN
OUT
LDO
USB_VDDA
_3P3
GPIO
REFE 2_CLK_DATA
2
RF Part
eUICC
(MFF-XS eUICC)
5
TX_PA1(LTE_LB)
SDR_TX_LB_GSM
SDR_TX_ MB_ GSM
LB LPF
GNSS
SAW f ilte r
Match ing
B71_RX
RX_LB_GSM
RX_MB_GSM
LB LPF
LB LPF
3
7
4
2