Specifications

Cinterion
®
EXS62-W/EXS82-W Hardware Interface Description
Figures
144
t EXS62-W_EXS82-W_HID_v01.200ee 2022-09-07
Public/ Released
Page 7 of 144
Figures
Figure 1: EXSx2-W system overview............................................................................ 13
Figure 2: EXS62-W ResM block diagram...................................................................... 14
Figure 3: EXS62-W ResM block diagram...................................................................... 15
Figure 4: EXSx2-W bottom view: Pad assignments...................................................... 18
Figure 5: EXSx2-W top view: Pad assignments............................................................ 19
Figure 6: USB circuit ..................................................................................................... 26
Figure 7: Serial interface ASC0..................................................................................... 27
Figure 8: ASC0 startup behavior................................................................................... 28
Figure 9: Serial interface ASC1..................................................................................... 29
Figure 10: ASC1 startup behavior................................................................................... 30
Figure 11: External UICC/SIM/USIM card holder circuit ................................................. 32
Figure 12: SIM interface - enhanced ESD protection...................................................... 33
Figure 13: eUICC interface with switch for external SIM................................................. 34
Figure 14: eUICC interface without SIM switch............................................................... 35
Figure 15: Interface bridging ........................................................................................... 36
Figure 16: GPIO start up behavior .................................................................................. 37
Figure 17: I
2
C interface connected to V180 .................................................................... 39
Figure 18: Characteristics of SPI modes......................................................................... 40
Figure 19: Status signaling with LED driver .................................................................... 41
Figure 20: Power indication circuit .................................................................................. 42
Figure 21: Fast shutdown timing ..................................................................................... 43
Figure 22: SIM switch circuit ........................................................................................... 45
Figure 23: Antenna pads (bottom view) .......................................................................... 50
Figure 24: Embedded Stripline with 65µm prepreg (1080) and 710µm core .................. 51
Figure 25: Micro-Stripline on 1.0mm standard FR4 2-layer PCB - example 1 ................ 52
Figure 26: Micro-Stripline on 1.0mm Standard FR4 PCB - example 2............................ 53
Figure 27: Micro-Stripline on 1.5mm Standard FR4 PCB - example 1............................ 54
Figure 28: Micro-Stripline on 1.5mm Standard FR4 PCB - example 2............................ 55
Figure 29: Routing to application‘s RF connector - top view........................................... 56
Figure 30: Sample supply voltage circuit for active GNSS antenna................................ 57
Figure 31: Schematic diagram of EXSx2-W sample application..................................... 60
Figure 32: Sample level conversion circuit...................................................................... 61
Figure 33: Sample ON circuit .......................................................................................... 63
Figure 34: ON startup behavior....................................................................................... 64
Figure 35: Automatic switch ON circuit sample............................................................... 65
Figure 36: Emergency restart behavior........................................................................... 66
Figure 37: Switch off behavior......................................................................................... 69
Figure 38: Low power modes with state transitions ........................................................ 74
Figure 39: Wake-up via RTS0......................................................................................... 75
Figure 40: Handshake for entering the module’s SUSPEND mode................................ 76
Figure 41: Handshake for module wake up via ON signal .............................................. 77
Figure 42: Handshake for module wake up after eDRX/PSM timer expiry ..................... 77
Figure 43: DRX based paging and power saving (SLEEP) in GSM networks ................ 78
Figure 44: DRX based paging and power saving (SLEEP) in LTE Cat M1 and Cat NB1/2
networks 79
Figure 45: eDRX based paging and power saving in LTE Cat M1 and Cat NB1/2 networks
80
Figure 46: eDRX/PSM based paging and power saving in LTE Cat M1 or Cat NB1/2 net-
works 81
Figure 47: Power supply limits during transmit burst....................................................... 96