Datasheet

13.0 Instruction Set (Continued)
13.6 INSTRUCTION SET SUMMARY
ADD A,Meml ADD A
←
A + Meml
ADC A,Meml ADD with Carry A
←
A+Meml+C,C
←
Carry,
HC
←
Half Carry
SUBC A,Meml Subtract with Carry A
←
A−MemI+C,C
←
Carry,
HC
←
Half Carry
AND A,Meml Logical AND A
←
A and Meml
ANDSZ A,Imm Logical AND Immed., Skip if Zero Skip next if (A and Imm) = 0
OR A,Meml Logical OR A
←
A or Meml
XOR A,Meml Logical EXclusive OR A
←
A xor Meml
IFEQ MD,Imm IF EQual Compare MD and Imm, Do next if MD = Imm
IFEQ A,Meml IF EQual Compare A and Meml, Do next if A = Meml
IFNE A,Meml IF Not Equal Compare A and Meml, Do next if A
≠
Meml
IFGT A,Meml IF Greater Than Compare A and Meml, Do next if A
>
Meml
IFBNE
#
If B Not Equal Do next if lower 4 bits of B
≠
Imm
DRSZ Reg Decrement Reg., Skip if Zero Reg
←
Reg − 1, Skip if Reg = 0
SBIT
#
,Mem Set BIT 1 to bit, Mem (bit = 0 to 7 immediate)
RBIT
#
,Mem Reset BIT 0 to bit, Mem
IFBIT
#
,Mem IF BIT If bit
#
, A or Mem is true do next instruction
RPND Reset PeNDing Flag Reset Software Interrupt Pending Flag
X A,Mem EXchange A with Memory A
↔
Mem
X A,[X] EXchange A with Memory [X] A
↔
[X]
LD A,Meml LoaD A with Memory A
←
Meml
LD A,[X] LoaD A with Memory [X] A
←
[X]
LD B,Imm LoaD B with Immed. B
←
Imm
LD Mem,Imm LoaD Memory Immed. Mem
←
Imm
LD Reg,Imm LoaD Register Memory Immed. Reg
←
Imm
XA,[B
±
] EXchange A with Memory [B] A
↔
[B], (B
←
B
±
1)
XA,[X
±
] EXchange A with Memory [X] A
↔
[X], (X
←
X
±
1)
LD A, [B
±
] LoaD A with Memory [B] A
←
[B], (B
←
B
±
1)
LD A, [X
±
] LoaD A with Memory [X] A
←
[X], (X
←
X
±
1)
LD [B
±
],Imm LoaD Memory [B] Immed. [B]
←
Imm, (B
←
B
±
1)
CLR A CLeaR A A
←
0
INC A INCrement A A
←
A+1
DEC A DECrement A A
←
A−1
LAID Load A InDirect from ROM A
←
ROM (PU,A)
DCOR A Decimal CORrect A A
←
BCD correction of A (follows ADC, SUBC)
RRC A Rotate A Right thru C C
→
A7
→
…
→
A0
→
C
RLC A Rotate A Left thru C C
←
A7
←
…
←
A0
←
C, HC
←
A0
SWAP A SWAP nibbles of A A7…A4
↔
A3…A0
SC Set C C
←
1, HC
←
1
RC Reset C C
←
0, HC
←
0
IFC IF C IF C is true, do next instruction
IFNC IF Not C If C is not true, do next instruction
POP A POP the stack into A SP
←
SP+1,A
←
[SP]
PUSH A PUSH A onto the stack [SP]
←
A, SP
←
SP−1
VIS Vector to Interrupt Service Routine PU
←
[VU], PL
←
[VL]
JMPL Addr. Jump absolute Long PC
←
ii (ii = 15 bits, 0 to 32k)
JMP Addr. Jump absolute PC9…0
←
i (i = 12 bits)
JP Disp. Jump relative short PC
←
PC+r(ris−31to+32, except 1)
COP8SA Family
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