user manual

dCS Verona User Manual Manual for Software Issue 1.0x
dCS Ltd September 2004
Manual filename: Verona Manual v1.0x.doc Page 24 email: [e-mail]
English version web-site: www.dcsltd.co.uk
VERONA TECHNICAL INFORMATION
Digital Interface Specifications
Wordclock Outputs
/ Ext. Ref. Input
Ext Ref Input Outputs
Type Single ended,
ground referred
Impedance 75 25
Ω
Level (unloaded) TTL TTL
Connector BNC BNC x 5
Table 1 –Wordclock Output / Ext Ref Input Electrical Characteristics
SPDIF
Outputs
Type Single ended,
ground referred
Impedance 75
Ω
Level (unloaded) 1.0 V pk-pk
Connector RCA Phono x 3
Table 2 – SPDIF Output Electrical Characteristics
Output Frequencies
44.1kHz or 48kHz on all Word Clock Outputs.
44.1kS/s or 48kS/s clock on all SPDIF Outputs.
Clocking
The sample clock quality significantly determines the output performance of the
system. The highest quality clocks that are available are crystals, so we use
these. Verona uses a pair of pre-aged, specially selected voltage controlled
crystal oscillators (VCXO’s) as clock sources. Each unit is individually calibrated
over a wide temperature range for best accuracy.
When slaving to Ext Ref In, the VCXO is synchronised to the clock signal
extracted from the input by a phase locked loop (PLL). This PLL is of a special
narrow bandwidth type, that provides a significant degree of "clock cleaning”.
The PLL is also very robust, and will lock to very poor signals if necessary.
Accuracy Typically ± 0.1 parts per million when shipped
Better than ± 1 part per million within 6 months of shipping
Synchronising to Ext Ref In x
The unit will slave to the following clock signals on the Ext Ref In connector:
• Word Clocks at 32, 44.1, 48, 88.2 or 96kHz (set the Couple menu to TTL).
• Reference clocks at 10MHz, such as those produced by GPS receivers or
atomic clocks (set the Couple menu to Bipolar).
Pull-in range ± 300 parts per million about nominal frequency
Lock-in time < 12 seconds for most situations