Statement of Volatility

ManualsBrandsDell ManualsComputer HardwarePowerEdge R630

Dell - Internal Use - Confidential

02 - 2013

Statement of Volatility – Dell PowerEdge R630

The Dell PowerEdge R630 contain both volatile and non-volatile (NV) components. Volatile components lose

their data immediately upon removal of power from the component. Non-volatile components continue to retain

their data even after the power has been removed from the component. Components chosen as user-definable

configuration options (those not soldered to the motherboard) are not included in the Statement of Volatility.

Configuration option information (pertinent to options such as microprocessors, remote access controllers, and

storage controllers) is available by component separately. The following NV components are present in the

PowerEdge R630 servers.

Item

Non-

Volatile or

Volatile

Quantity

Reference Designator

Size

Planer

PCH Internal CMOS RAM

Non-

Volatile

1 U_PCH 256 Bytes

BIOS Password

Non-

Volatile

1 U_PCH 16 bytes

BIOS SPI Flash

Non-

Volatile

1 U_SPI_BIOS 8 MB

iDRAC SPI Flash

Non-

Volatile

1 U_IDRAC_SPI 4 MB

BMC EMMC

Non-

Volatile

1 U_EMMC 4 GB

CPU Vcore Regulators

Non-

Volatile

2 U8003, U8043 512 Bytes

Vmem Regulators

Non-

Volatile

2 U8011, U8051 512 Bytes

System CPLD RAM

Volatile

U_CPLD

1 KB

Summary of content (11 pages)

PAGE 1
Statement of Volatility – Dell PowerEdge R630 The Dell PowerEdge R630 contain both volatile and non-volatile (NV) components. Volatile components lose their data immediately upon removal of power from the component. Non-volatile components continue to retain their data even after the power has been removed from the component. Components chosen as user-definable configuration options (those not soldered to the motherboard) are not included in the Statement of Volatility.
PAGE 2
Item NonVolatile or Volatile System Memory Quantity Reference Designator Size Volatile Up to 12 per CPU CPU<2:1>_CH<3:0>_D<2:0> Up to 32GB per DIMM Internal USB Key NonVolatile Up to 1 N/A Varies (not factory installed) Trusted Platform Module (TPM) NonVolatile 1 U_TPM 128 Bytes CPU Volatile 1 or 2 CPU1 / CPU2 Various iDRAC DDR Volatile 1 U_IDRAC_MEM 256MByte iDRAC Volatile U_IDRAC 64 kbyte + registers 1 8x2.
PAGE 3
Item NonVolatile or Volatile NVSRAM Nonvolatile FRU Quantity Reference Designator Size 1 U1033 128KB Nonvolatile 1 U1019 256B 1-Wire EEPROM Nonvolatile 1 U1004 128B SPD Nonvolatile 1 U22 256B SBR Nonvolatile 1 U1020 8KB Flash Nonvolatile 1 U1031 16MB ONFI Backup Flash Nonvolatile 1 U1059 4GB SDRAM Volatile 5 U1043-U1047 512MB/1GB NVSRAM Nonvolatile 1 U1033 128KB FRU Nonvolatile 1 U1019 256B 1-Wire EEPROM Nonvolatile 1 U1004 128B SBR Nonvolatile 1
PAGE 4
NonVolatile or Volatile Item Quantity Reference Designator Size IDSDM SPI Flash NonVolatile 1 U2 8Mb MCU NonVolatile 1 U6 512KB NonVolatile 1 U3 32Mb NonVolatile 1 U6 32Mb 1 U_MSP430 128KB x8 Control Panel rSPI Flash x10/x24 Control Panel rSPI Flash iDRAC Quick Sync NonVolatile MCU MSP430 Type (e.g. Flash PROM, EEPROM) Item Can user programs or operating system write data to it during normal operation? Purpose? (e.g.
PAGE 5
Type (e.g. Flash PROM, EEPROM) Item Can user programs or operating system write data to it during normal operation? Purpose? (e.g. boot code) iDRAC SPI Flash SPI Flash No iDRAC Uboot (bootloader), server management persistent store (i.e.
PAGE 6
Item Type (e.g. Flash PROM, EEPROM) Can user programs or operating system write data to it during normal operation? Purpose? (e.g.
PAGE 7
Type (e.g. Flash PROM, EEPROM) Item Can user programs or operating system write data to it during normal operation? Purpose? (e.g.
PAGE 8
How is data input to this memory? Item How is this memory write protected? How is the memory cleared? Planer PCH Internal CMOS RAM BIOS N/A – BIOS only control 1) Set NVRAM_CLR jumper to clear BIOS configuration settings at boot and reboot system; 2) AC power off system, remove coin cell battery for 30 seconds, replace battery and power back on; 3) restore default configuration in F2 system setup menu. BIOS Password Keyboard N/A Place shunt on J_PSWD_NVRAM jumper pins 2 and 4.
PAGE 9
Item How is data input to this memory? How is this memory write protected? How is the memory cleared? CPU Various Various Power off iDRAC DDR iDRAC Firmware NA Power off iDRAC iDRAC Firmware NA Power off I2C interface via iDRAC Program write protect bit Not user clearable 8x2.5" Backplane SEP internal flash 10x2.5" (or 6x2.
PAGE 10
Item How is data input to this memory? How is this memory write protected? How is the memory cleared? SBR Pre-programmed before assembly Not WP. Not visible to Host Processor Cannot be cleared with existing tools available to the customer Flash Pre-programmed before assembly. Can be updated using Dell/LSI tools Not WP.
PAGE 11
How is data input to this memory? How is this memory write protected? via PLX Device Editor or PLX EEP DOS based tool. WPEN bit in status register. SPI Flash SPI interface via iDRAC Hardware strapping Not user clearable MCU USB3.