Reference Manual

16-Axis MACRO CPU Software Reference Manual
16-Axis MACRO Station Memory and I/O Map 81
19 I/O19 Data Type Control (0=USER10; 1=I/O19)
20 I/O20 Data Type Control (0=FlagT10; 1=I/O20)
21 I/O21 Data Type Control (0=FlagU10; 1=I/O21)
22 I/O22 Data Type Control (0=FlagV10; 1=I/O22)
23 I/O23 Data Type Control (0=FlagW10; 1=I/O23)
(All bits: 0=dedicated hardware I/O; 1=general I/O)
(All bits must be 0 for use with ACC-1E 2-axis piggyback board)
X:$C084 Data Inversion Control Register (when used as general I/O; see
Y:$C084)
Bits: 0 I/O00 Inversion Control
...
23 I/O23 Inversion Control
(All bits: 0=Non-inverting; 1=Inverting)
Y:$C085 General I/O Data Type Control Register
Bits: 0 I/O24 Data Type Control
...
7 I/O31 Data Type Control
(These bits are always 1; there is no alternate mode for these lines)
8-23 Not used
X:$C085 General I/O Data Inversion Control
Bits: 0 I/O24 Inversion Control
...
7 I/O31 Inversion Control
(All bits: 0=Non-inverting; 1=Inverting)
8-23 Not used
Y:$C086 Data Type Control Register
Bits: 0 DAT0 Data Type Control (0=ENCC9; 1 =DAT0)
1 DAT1 Data Type Control (0=ENCC10; 1 =DAT1)
2 DAT2 Data Type Control (0=Fault9; 1 =DAT2)
3 DAT3 Data Type Control (0=Fault10; 1 =DAT3)
4 DAT4 Data Type Control (0=EQU9; 1 =DAT4)
5 DAT5 Data Type Control (0=EQU10; 1 =DAT5)
6 DAT6 Data Type Control (0=AENA9; 1 =DAT6)
7 DAT7 Data Type Control (0=AENA10; 1 =DAT7)
8 SEL0 Data Type Control (0=ADC_STROB; 1=SEL0)
9 SEL1 Data Type Control (0=ADC_CLK; 1=SEL1)
10 SEL2 Data Type Control (0=ADC_A9; 1=SEL2)
11 SEL3 Data Type Control (0=ADC_B9; 1=SEL3)
12 SEL4 Data Type Control (0=ADC_A10; 1=SEL4)
13 SEL5 Data Type Control (0=ADC_B10; 1=SEL5)
14 SEL6 Data Type Control (0=SCLK; 1=SEL6)
15 SEL7 Data Type Control (0=SCLK_DIR*; 1=SEL7)
(All bits: 0=dedicated hardware I/O; 1=general I/O)
(All bits must be 0 for use with ACC-1E 2-axis piggyback board)
16-23 Not used
X:$C086 JTHW Port Data Inversion Control Register (when used as general I/O; see
Y:$C086)
Bits: 0 DAT0 Inversion Control
...
7 DAT7 Inversion Control