User's Manual

Table Of Contents
16-Axis MACRO CPU User Manual
16-Axis MACRO CPU Software Setup 37
MACRO IC 1 ($$$***)
Number of
Servo ICs (IC #)
Node Servo IC
Base Address
Associated Node Y:I181…188 Encoder Conversion
Table (ECT)
1 (#3) $9000,$9008,
$9010,$9018,
$9000,$9008,
$9010,$9018,
0,1,
4,5,
8,9,
12,13
I181, I182,
I183, I184,
I185, I186,
I187, I188
(ECT limited to four entries,
(MI124=0))
2 (#3 and #4) $9000,$9008,
$9010,$9018,
$9040,$9048,
$9050,$9058,
0,1,
4,5,
8,9,
12,13
I181, I182,
I183, I184,
I185, I186,
I187, I188
(ECT set to eight entries,
(MI128=0) )
MACRO IC 1 ($$$)
Number of
Servo ICs (IC #)
Node Servo IC
Base Address
Associated Node I181…188 MI996 (# Servo Y: nodes
enabled)
1 (#3) $9000,$9008,
$9000,$9008,
$9000,$9008,
$9000,$9008,
0,1,
4,5,
8,9,
12,13
I181, I182,
I183, I184,
I185, I186,
I187, I188
1 or 2
1 (#3) $9000,$9008,
$9010,$9018,
$9000,$9008,
$9010,$9018,
0,1,
4,5,
8,9,
12,13
I181, I182,
I183, I184,
I185, I186,
I187, I188
> 2
2 (#3 and #4) $9000,$9008,
$9010,$9018,
$9040,$9048,
$9050,$9058,
0,1,
4,5,
8,9,
12,13
I181, I182,
I183, I184,
I185, I186,
I187, I188
> 2
Multi-Channel Servo Interface Setup
Several MI-Variables on the 16-Axis MACRO CPU affect the hardware setup of multiple machine
interface channels on the Station. Because these variables are not specific to one channel or node, they
can be accessed with an MS{anynode} command, where {anynode} is the number of any active node
on the Station that is not active on another Station as well.
Channels 1-4 (First 4-Axis Board)
There are several variables that affect all of the machine interface channels 1 to 4. These MI-Variables
reference MI179 for the Servo IC’s base address.
PWM Frequency: MI900 controls the PWM frequency of Channels 1-4. Its setting is important only if
the PWM outputs are used through the PMAC2-style connectors. The equation for the frequency is:
PWM Frequency (kHz) = 117,964.8 / [4*MI900 + 6]
Generally, MI900 is set to the same value as MI992 which controls the PWM frequency for Channels 9
and 10 and the MaxPhase clock frequency. The PWM frequency set by MI900 must be equal to N/2
times the Phase clock frequency set by MI992 and MI997, where N is a positive integer.
Hardware Clock Frequencies: MI903 controls the frequencies of the four hardware clock signals for
Channels 1-4: the encoder sample SCLK, the pulse-and-direction PFMCLK, the analog output DAccLK,
and the analog input ADCCLK. MI903 is a 12-bit value consisting of four independent 3-bit parts, each
controlling one of the clock frequencies. The equation is:
MI903 = SCLK Divider + 8*PFMCLK Divider + 64*DAccLK Divider
+ 512*ADCCLK Divider
The value of each clock divider can take a value of 0 to 7 and the frequency of each clock signal is:
Clock Frequency = 39.3216 MHz / [2^Clock Divider]