User's Manual

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16-Axis MACRO CPU User Manual
16-Axis MACRO CPU Software Setup 45
Station MI-Variable MI989 specifies the address of the I/O register where the multiplexed A/D converters
actually reside. The conversion table will read the de-multiplexed data in the internal memory registers.
The first line of the entry contains the $20 method and the source address. The second line contains the
bits used mask word, which is a 24-bit value containing a 1 for every bit of the source register to be used.
The first eight analog inputs occupy the low 12 bits of the 24-bit word, so their mask word is $000FFF.
The second eight analog inputs occupy the high 12 bits, so their mask word is $FFF000.
The following table shows the conversion table MI-Variable values for the first and second lines (MI-
variables) of these entries for MACRO IC 0:
Analog
Input Pin
Entry First MI-
Variable Value
Entry Second MI-
Variable Value
Analog
Input Pin
Entry First MI-
Variable Value
Entry Second MI-
Variable Value
ANAI00 $200200 $000FFF ANAI08 $200200 $FFF000
ANAI01 $200201 $000FFF ANAI09 $200201 $FFF000
ANAI02 $200202 $000FFF ANAI10 $200202 $FFF000
ANAI03 $200203 $000FFF ANAI11 $200203 $FFF000
ANAI04 $200204 $000FFF ANAI12 $200204 $FFF000
ANAI05 $200205 $000FFF ANAI13 $200205 $FFF000
ANAI06 $200206 $000FFF ANAI14 $200206 $FFF000
ANAI07 $200207 $000FFF ANAI15 $200207 $FFF000
The following table shows the conversion table MI-variable values for the first and second lines (MI-
variables) of these entries for MACRO IC 1:
Analog
Input Pin
Entry First MI-
Variable Value
Entry Second MI-
Variable Value
Analog
Input Pin
Entry First MI-
Variable Value
Entry Second MI-
Variable Value
ANAI00 $200208 $000FFF ANAI08 $200208 $FFF000
ANAI01 $200209 $000FFF ANAI09 $200209 $FFF000
ANAI02 $20020A $000FFF ANAI10 $20020A $FFF000
ANAI03 $20020B $000FFF ANAI11 $20020B $FFF000
ANAI04 $20020C $000FFF ANAI12 $20020C $FFF000
ANAI05 $20020D $000FFF ANAI13 $20020D $FFF000
ANAI06 $20020E $000FFF ANAI14 $20020E $FFF000
ANAI07 $20020F $000FFF ANAI15 $20020F $FFF000
If the $30 filtered parallel method is used instead of $20, it is a 3-line entry instead of a 2-line entry. The
third line of the entry contains the maximum change in the input value that the table will let through in
one ring cycle. This provides a filter that is a protection against noise. This value should be set to a value
slightly greater than the maximum true velocity expected. The units are bits of the ADC per ring cycle.
Note:
Station Variable MI988 controls whether the A/D converters are expecting inputs
in the -2.5V to +2.5V range or in the 0 to +5V range.
This method can be used also for the 16-bit ADCs on an Acc-28E backplane board. The following table
shows the possible entry settings, depending on the settings of dip switch S1 on the board.
S1-1 S1-2 ADC1 ADC2 ADC3 ADC4
ON ON $18FFE0 $18FFE1 $18FFE2 $18FFE3
OFF ON $18FFE8 $18FFE9 $18FFEA $18FFEB
ON OFF $18FFF0 $18FFF1 $18FFF2 $18FFF3
OFF OFF $18B8C0* $18B8C1* $18B8C2* $18B8C3*
* Requires Station firmware revision V1.115 or newer to use this setting.