User's Manual
Table Of Contents
- 16-Axis MACRO Slave Station Binding to a MACRO Master
- Mapping Servo Channels to Servo Node
- Mapping Motor Node Registers
- Mapping Motor Function Registers to Node Registers
- Mapping of General Purpose I/O
- UMAC (Pack) Configuration
- I/O Accessory Boards
- Auto Configuration and Identification of UMAC (Pack) Boards
- UMAC (Pack) Interface/Breakout Boards
- MACRO Ring Rules
- I7: Phase Cycle Extension
- I19: Clock Source I-Variable Number
- Turbo PMAC2 Ultralite: I6800 and I6801
- UMAC Turbo
- Notes on Servo Clock
- I6840: MACRO IC 0 Master Configuration
- I6890/I6940/I6990: MACRO IC 1/2/3 Master Configuration
- I6841/I6891/I6941/I6991: MACRO IC 0/1/2/3 Node Activation Control
- I70/I72/I74/I76: MACRO IC 0/1/2/3 Node Auxiliary Function Enable
- I71/I73/I75/I77: MACRO IC 0/1/2/3 Node Protocol Type Control
- I78: MACRO Master/Slave Auxiliary Communications Timeout
- I79: MACRO Master/Master Auxiliary Communications Timeout
- I80, I81, I82: MACRO Ring Check Period and Limits
- Ixx01: Commutation Enable
- Ixx02: Command Output Address
- Ixx03, Ixx04: Feedback Address
- Ixx10, Ixx95: Absolute Position Address and Format
- Ixx25, Ixx24: Flag Address and Mode
- Ixx70, Ixx71: Commutation Cycle Size
- Ixx75: Absolute Phase Position Offset
- Ixx81, Ixx91: Power-On Phase Position Address and Mode
- Ixx82: Current Loop Feedback Address
- Ixx83: Commutation Feedback Address
- Ring Update Frequency
- Station Servo Clock Frequency
- MACRO IC 0
- MACRO IC 1
- MACRO IC 0
- MACRO IC 1
- Channels 1-4 (First 4-Axis Board)
- Channels 5-8 (Second 4-Axis Board)
- On Board Auxiliary Channels (Handwheel/Pulse and Direction)
- Incremental Digital Encoder Feedback
- Analog Encoder Feedback
- Resolver Feedback
- MLDT Feedback
- 12-Bit A/D Converter Feedback
- 14E Parallel Feedback
- MI17 Amplifier Fault Disable Control
- MI18 Amplifier Fault Polarity Control
- MI10x Position Feedback Address
- MI11x Power-On Position Feedback Address
- MI16x Power-On MLDT Excitation Value
- MI975 I/O Node Enable
- MI19 I/O Transfer Period
- Bi-Directional I/O Transfer Control
- Uni-Directional I/O Transfer Control
- Setting the Trigger Condition
- Using for Homing
- Using in User Program
- Setting up for a Single Pulse Output
- Setting up for Multiple Pulse Outputs
- How to Enable and Disable MACRO ASCII Communication Mode
- The Ring Order Method
- Example: Read Using MM-Variables – Actual Encoder
- Example: Read DAC Output from Servo IC Card
- Example: Monitor Up/Down Counter from Servo IC Card
- Example: Write to DACnB on Servo IC Card
- Example: Read Using MI198 and MI199 – Direct Hal
- Example: Read Using MI198 and MI199 – Actual DAC
16-Axis MACRO CPU User Manual
16-Axis MACRO CPU Software Setup 49
• MI71: This variable copies I/O values between 24-bit MACRO node registers (Register 0) and
accessory-board I/O registers. This is valuable particularly for single I/O boards with 48 I/O points.
• MI169: This variable copies 72 I/O values between an entire 72-bit MACRO node and accessory-
board I/O registers.
• MI171, MI172, and MI173: These variables copy 144 I/O values between a pair of 72-bit MACRO
nodes and accessory-board I/O registers. These are valuable for fully configured Acc-3E boards or a
set of three backplane I/O boards sharing a common base address.
MACRO Node Addressing: In each of these variables, both the address of a MACRO I/O node register
and an I/O board base address register must be specified. The following table lists the possible MACRO
I/O node register addresses for MACRO IC0:
I/O Node # Register 0
X-Address
Register 1
X-Address
Register 2
X-Address
Register 3
X-Address
2 $C0A0 $C0A1 $C0A2 $C0A3
3 $C0A4 $C0A5 $C0A6 $C0A7
6 $C0A8 $C0A9 $C0AA $C0AB
7 $C0AC $C0AD $C0AE $C0AF
10 $C0B0 $C0B1 $C0B2 $C0B3
11 $C0B4 $C0B5 $C0B6 $C0B7
14* $C0B8 $C0B9 $C0BA $C0BB
*Node 14 may be used only for these I/O transfers if no Type 1 Master/Master auxiliary
communications are being performed on the ring between Turbo PMAC2 boards.
I/O Board Addressing: The 3U-format I/O boards are built around IOGATE I/O ASICs. Each
IOGATE IC controls 48 I/O points, mapped into the MACRO Station’s addressing scheme as six bytes in
consecutive registers (Base_address to Base_address+5). The MACRO Station has a 24-bit data bus, so it
is possible to have up to three IOGATE ICs in the same address space. Many of the I/O boards support
this, as do the bi-directional copying variables.
The single IOGATE IC of the Acc-4E is mapped into the low byte of the addresses it occupies. The Acc-
3E may have up to three ICs, according to the options installed as listed by the following table:
Option Byte on Data Bus I/O Points
A Low (bits 0 – 7) I/O00 – I/O47
B Middle (bits 8 – 15) I/O48 – I/O95
C High (bits 16 – 23) I/O96 – I/O143
The following table lists the possible base addresses of the Acc-9E, 10E, 11E, and 12E backplane
(UMAC) I/O boards:
Acc Board
Address Jumper ON
Board Base
Y-Address
E1 $FFE0
E2 $FFE8
E3 $FFF0
E4 $B8C0*
*Requires Station firmware revision V1.115 or newer