User's Manual
Table Of Contents
- 16-Axis MACRO Slave Station Binding to a MACRO Master
- Mapping Servo Channels to Servo Node
- Mapping Motor Node Registers
- Mapping Motor Function Registers to Node Registers
- Mapping of General Purpose I/O
- UMAC (Pack) Configuration
- I/O Accessory Boards
- Auto Configuration and Identification of UMAC (Pack) Boards
- UMAC (Pack) Interface/Breakout Boards
- MACRO Ring Rules
- I7: Phase Cycle Extension
- I19: Clock Source I-Variable Number
- Turbo PMAC2 Ultralite: I6800 and I6801
- UMAC Turbo
- Notes on Servo Clock
- I6840: MACRO IC 0 Master Configuration
- I6890/I6940/I6990: MACRO IC 1/2/3 Master Configuration
- I6841/I6891/I6941/I6991: MACRO IC 0/1/2/3 Node Activation Control
- I70/I72/I74/I76: MACRO IC 0/1/2/3 Node Auxiliary Function Enable
- I71/I73/I75/I77: MACRO IC 0/1/2/3 Node Protocol Type Control
- I78: MACRO Master/Slave Auxiliary Communications Timeout
- I79: MACRO Master/Master Auxiliary Communications Timeout
- I80, I81, I82: MACRO Ring Check Period and Limits
- Ixx01: Commutation Enable
- Ixx02: Command Output Address
- Ixx03, Ixx04: Feedback Address
- Ixx10, Ixx95: Absolute Position Address and Format
- Ixx25, Ixx24: Flag Address and Mode
- Ixx70, Ixx71: Commutation Cycle Size
- Ixx75: Absolute Phase Position Offset
- Ixx81, Ixx91: Power-On Phase Position Address and Mode
- Ixx82: Current Loop Feedback Address
- Ixx83: Commutation Feedback Address
- Ring Update Frequency
- Station Servo Clock Frequency
- MACRO IC 0
- MACRO IC 1
- MACRO IC 0
- MACRO IC 1
- Channels 1-4 (First 4-Axis Board)
- Channels 5-8 (Second 4-Axis Board)
- On Board Auxiliary Channels (Handwheel/Pulse and Direction)
- Incremental Digital Encoder Feedback
- Analog Encoder Feedback
- Resolver Feedback
- MLDT Feedback
- 12-Bit A/D Converter Feedback
- 14E Parallel Feedback
- MI17 Amplifier Fault Disable Control
- MI18 Amplifier Fault Polarity Control
- MI10x Position Feedback Address
- MI11x Power-On Position Feedback Address
- MI16x Power-On MLDT Excitation Value
- MI975 I/O Node Enable
- MI19 I/O Transfer Period
- Bi-Directional I/O Transfer Control
- Uni-Directional I/O Transfer Control
- Setting the Trigger Condition
- Using for Homing
- Using in User Program
- Setting up for a Single Pulse Output
- Setting up for Multiple Pulse Outputs
- How to Enable and Disable MACRO ASCII Communication Mode
- The Ring Order Method
- Example: Read Using MM-Variables – Actual Encoder
- Example: Read DAC Output from Servo IC Card
- Example: Monitor Up/Down Counter from Servo IC Card
- Example: Write to DACnB on Servo IC Card
- Example: Read Using MI198 and MI199 – Direct Hal
- Example: Read Using MI198 and MI199 – Actual DAC
16-Axis MACRO CPU User Manual
84 Node Transfer Addresses Chart
Turbo PMAC2 Node Addresses
MACRO
IC Node
Axis/IO User
Node
Node 24-bit
Transfer Addresses
Node 16-bit (upper 16 bits)
Transfer Addresses
(IC0 ) 0 Axis 1 0 Y:$078420 Y:$078421, Y:$078422, Y:$078423
(IC0) 1 Axis 2 1 Y:$078424 Y:$078425, Y:$078426, Y:$078427
(IC0 ) 2 I/O 2 X:$078420 X:$078421, X:$078422, X:$078423
(IC0) 3 I/O 3 X:$078424 X:$078425, X:$078426, X:$078427
(IC0) 4 Axis 3 4 Y:$078428 Y:$078429, Y:$07842A, Y:$07842B
(IC0) 5 Axis 4 5 Y:$07842C Y:$07842D, Y:$07842E, Y:$07842F
(IC0) 6 I/O 6 X:$078428 X:$078429, X:$07842A, X:$07842B
(IC0) 7 I/O 7 X:$07842C X:$07842D, X:$07842E, X:$07842F
(IC0) 8 Axis 5 8 Y:$078430 Y:$078431, Y:$078432, Y:$078433
(IC0) 9 Axis 6 9 Y:$078434 Y:$078435, Y:$078436, Y:$078437
(IC0) 10 I/O 10 X:$078430 X:$078431, X:$078432, X:$078433
(IC0) 11 I/O 11 X:$078434 X:$078435, X:$078436, X:$078437
(IC0) 12 Axis7 12 Y:$078438 Y:$078439, Y:$07843A, Y:$07843B
(IC0) 13 Axis 8 13 Y:$07843C Y:$07843D, Y:$07843E, Y:$07843F
(IC0) 14 Master/Master 14 X:$078438 X:$078439, X:$07843A, X:$07843B
(IC0) 15 Master/Slave 15 X:$07843C X:$07843D, X:$07843E, X:$07843F
(IC1 ) 0 Axis 9 16 Y:$079420 Y:$079421, Y:$079422, Y:$079423
(IC1) 1 Axis 10 17 Y:$079424 Y:$079425, Y:$079426, Y:$079427
(IC1 ) 2 I/O 18 X:$079420 X:$079421, X:$079422, X:$079423
(IC1) 3 I/O 19 X:$079424 X:$079425, X:$079426, X:$079427
(IC1) 4 Axis 11 20 Y:$079428 Y:$079429, Y:$07942A, Y:$07942B
(IC1) 5 Axis 12 21 Y:$07942C Y:$07942D, Y:$07942E, Y:$07942F
(IC1) 6 I/O 22 X:$079428 X:$079429, X:$07942A, X:$07942B
(IC1) 7 I/O 23 X:$07942C X:$07942D, X:$07942E, X:$07942F
(IC1) 8 Axis 13 24 Y:$079430 Y:$079431, Y:$079432, Y:$079433
(IC1) 9 Axis 14 25 Y:$079434 Y:$079435, Y:$079436, Y:$079437
(IC1) 10 I/O 26 X:$079430 X:$079431, X:$079432, X:$079433
(IC1) 11 I/O 27 X:$079434 X:$079435, X:$079436, X:$079437
(IC1) 12 Axis 15 28 Y:$079438 Y:$079439, Y:$07943A, Y:$07943B
(IC1) 13 Axis 16 29 Y:$07943C Y:$07943D, Y:$07943E, Y:$07943F
(IC1) 14 Master/Master 30 X:$079438 X:$079439, X:$07943A, X:$07943B
(IC1) 15 Master/Slave 31 X:$07943C X:$07943D, X:$07943E, X:$07943F
(IC2 ) 0 Axis 17 32 Y:$07A420 Y:$07A421, Y:$07A422, Y:$07A423
(IC2) 1 Axis 18 33 Y:$07A424 Y:$07A425, Y:$07A426, Y:$07A427
(IC2 ) 2 I/O 34 X:$07A420 X:$07A421, X:$07A422, X:$07A423
(IC2) 3 I/O 35 X:$07A424 X:$07A425, X:$07A426, X:$07A427
(IC2) 4 Axis 19 36 Y:$07A428 Y:$07A429, Y:$07A42A, Y:$07A42B
(IC2) 5 Axis 20 37 Y:$07A42C Y:$07A42D, Y:$07A42E, Y:$07A42F
(IC2) 6 I/O 38 X:$07A428 X:$07A429, X:$07A42A, X:$07A42B
(IC2) 7 I/O 39 X:$07A42C X:$07A42D, X:$07A42E, X:$07A42F
(IC2) 8 Axis 21 40 Y:$07A430 Y:$07A431, Y:$07A432, Y:$07A433
(IC2) 9 Axis 22 41 Y:$07A434 Y:$07A435, Y:$07A436, Y:$07A437
(IC2) 10 I/O 42 X:$07A430 X:$07A431, X:$07A432, X:$07A433
(IC2) 11 I/O 43 X:$07A434 X:$07A435, X:$07A436, X:$07A437
(IC2) 12 Axis 23 44 Y:$07A438 Y:$07A439, Y:$07A43A, Y:$07A43B
(IC2) 13 Axis 24 45 Y:$07A43C Y:$07A43D, Y:$07A43E, Y:$07A43F
(IC2) 14 Master/Master 46 X:$07A438 X:$07A439, X:$07A43A, X:$07A43B
(IC2) 15 Master/Slave 47 X:$07A43C X:$07A43D, X:$07A43E, X:$07A43F
(IC3 ) 0 Axis 25 48 Y:$07B420 Y:$07B421, Y:$07B422, Y:$07B423