User's Manual

Table Of Contents
16-Axis MACRO CPU User Manual
Node Transfer Addresses Chart 85
(IC3) 1 Axis 26 49 Y:$07B424 Y:$07B425, Y:$07B426, Y:$07B427
(IC3 ) 2 I/O 50 X:$07B420 X:$07B421, X:$07B422, X:$07B423
(IC3) 3 I/O 51 X:$07B424 X:$07B425, X:$07B426, X:$07B427
(IC3) 4 Axis 27 52 Y:$07B428 Y:$07B429, Y:$07B42A, Y:$07B42B
(IC3) 5 Axis 28 53 Y:$07B42C Y:$07B42D, Y:$07B42E, Y:$07B42F
(IC3) 6 I/O 54 X:$07B428 X:$07B429, X:$07B42A, X:$07B42B
(IC3) 7 I/O 55 X:$07B42C X:$07B42D, X:$07B42E, X:$07B42F
(IC3) 8 Axis 29 56 Y:$07B430 Y:$07B431, Y:$07B432, Y:$07B433
(IC3) 9 Axis 30 57 Y:$07B434 Y:$07B435, Y:$07B436, Y:$07B437
(IC3) 10 I/O 58 X:$07B430 X:$07B431, X:$07B432, X:$07B433
(IC3) 11 I/O 59 X:$07B434 X:$07B435, X:$07B436, X:$07B437
(IC3) 12 Axis 31 60 Y:$07B438 Y:$07B439, Y:$07B43A, Y:$07B43B
(IC3) 13 Axis 32 61 Y:$07B43C Y:$07B43D, Y:$07B43E, Y:$07B43F
(IC3) 14 Master/Master 62 X:$07B438 X:$07B439, X:$07B43A, X:$07B43B
(IC3) 15 Master/Slave 63 X:$07B43C X:$07B43D, X:$07B43E, X:$07B43F