Reference Manual

Turbo PMAC/PMAC2 Software Reference
Turbo PMAC Memory and I/O Map 510
MACRO Ring Status Registers
X:$00343A Current ring test period count
X:$00343B MACRO IC 0 ring status
Bits
0 – 11 Error count. Increments when any of these error bits are high:
Data Overrun
Byte Violation
Packet Parity
Data Underrun
The maximum number of errors this register can hold is 4. This number
of errors is compared to the tolerable number of errors defined by I81.
12 – 23 Sync packet count. Increments when sync is received. Sync must be
received for MACRO to continue operating.
Y:$00343B MACRO IC 0 ring error count (from power-up/reset). Stores sum of
all errors flagged from the four error types:
Data Overrun
Byte Violation
Packet Parity
Data Underrun
X:$00343C MACRO IC 1 ring status
Bits
0 – 11 Error count
12 – 23 Sync packet count
Y:$00343C MACRO IC 1 ring error count (from power-up/reset)
X:$00343D MACRO IC 2 ring status
Bits
0 – 11 Error count
12 – 23 Sync packet count
Y:$00343D MACRO IC 2 ring error count (from power-up/reset)
X:$00343E MACRO IC 3 ring status
Bits
0 – 11 Error count
12 – 23 Sync packet count
Y:$00343E MACRO IC 3 ring error count (from power-up/reset)
X:$00343F MACRO flag transfer time
Y:$00343F Previous MACRO command