Reference Manual

Turbo PMAC/PMAC2 Software Reference
Turbo PMAC Suggested M-Variable Definitions 588
Servo IC 5 Registers for Second Acc-24 Channel 8 (usually for Motor #24)
M2401->X:$07930D,0,24,S ; ENC8 24-bit counter position
M2402->Y:$07930A,8,16,S ; DAC8 16-bit analog output
M2403->X:$07930F,0,24,S ; ENC8 capture/compare position register
M2405->Y:$07930F,8,16,S ; ADC8 16-bit analog input
M2406->Y:$07930C,0,24,U ; ENC8 time between counts (SCLK cycles)
M2410->X:$07930C,10,1 ; ENC8 count-write enable control
M2411->X:$07930C,11,1 ; EQU8 compare flag latch control
M2412->X:$07930C,12,1 ; EQU8 compare output enable
M2413->X:$07930C,13,1 ; EQU8 compare invert enable
M2414->X:$07930C,14,1 ; AENA8/DIR8 Output
M2416->X:$07930C,16,1 ; EQU8 compare flag
M2417->X:$07930C,17,1 ; ENC8 position-captured flag
M2418->X:$07930C,18,1 ; ENC8 Count-error flag
M2419->X:$07930C,19,1 ; ENC8 3rd channel input status
M2420->X:$07930C,20,1 ; HMFL8 input status
M2421->X:$07930C,21,1 ; -LIM8 (positive end) input status
M2422->X:$07930C,22,1 ; +LIM8 (negative end) input status
M2423->X:$07930C,23,1 ; FAULT8 input status
Motor #24 Status Bits
M2430->Y:$000C40,11,1 ; #24 Stopped-on-position-limit bit
M2431->X:$000C30,21,1 ; #24 Positive-end-limit-set bit
M2432->X:$000C30,22,1 ; #24 Negative-end-limit-set bit
M2433->X:$000C30,13,1 ; #24 Desired-velocity-zero bit
M2435->X:$000C30,15,1 ; #24 Dwell-in-progress bit
M2437->X:$000C30,17,1 ; #24 Running-program bit
M2438->X:$000C30,18,1 ; #24 Open-loop-mode bit
M2439->X:$000C30,19,1 ; #24 Amplifier-enabled status bit
M2440->Y:$000C40,0,1 ; #24 Background in-position bit
M2441->Y:$000C40,1,1 ; #24 Warning-following error bit
M2442->Y:$000C40,2,1 ; #24 Fatal-following-error bit
M2443->Y:$000C40,3,1 ; #24 Amplifier-fault-error bit
M2444->Y:$000C40,13,1 ; #24 Foreground in-position bit
M2445->Y:$000C40,10,1 ; #24 Home-complete bit
M2446->Y:$000C40,6,1 ; #24 Integrated following error fault bit
M2447->Y:$000C40,5,1 ; #24 I2T fault bit
M2448->Y:$000C40,8,1 ; #24 Phasing error fault bit
M2449->Y:$000C40,9,1 ; #24 Phasing search-in-progress bit
Motor #24 Move Registers
M2461->D:$000C08 ; #24 Commanded position (1/[Ixx08*32] cts)
M2462->D:$000C0B ; #24 Actual position (1/[Ixx08*32] cts)
M2463->D:$000C47 ; #24 Target (end) position (1/[Ixx08*32] cts)
M2464->D:$000C4C ; #24 Position bias (1/[Ixx08*32] cts)
M2466->X:$000C1D,0,24,S ; #24 Actual velocity (1/[Ixx09*32] cts/cyc)
M2467->D:$000C0D ; #24 Present master pos (1/[Ixx07*32] cts)
M2468->X:$000C3F,8,16,S ; #24 Filter Output (16-bit DAC bits)
M2469->D:$000C10 ; #24 Compensation correction (1/[Ixx08*32] cts)
M2470->D:$000C34 ; #24 Present phase position (including fraction)
M2471->X:$000C34,24,S ; #24 Present phase position (counts *Ixx70)
M2472->L:$000C57 ; #24 Variable jog position/distance (cts)
M2473->Y:$000C4E,0,24,S ; #24 Encoder home capture position (cts)