Reference Manual

Turbo PMAC/PMAC2 Software Reference
Turbo PMAC Global I-Variables 63
If the host computer baud rate cannot be made to match the Turbo PMAC’s baud rate, the Turbo PMAC’s
baud rate must be changed through another communications port.
I54 Serial Port Baud Rate Control
Range: 0 to 15
Units: None
Default: 12 (38400 baud)
I54 controls the baud rate for communications on the main serial port. Turbo PMAC uses I54 only at
power-up/reset to set up the frequency of the clocking circuit for the serial port. To change the baud rate,
it is necessary to change the value of I54, store this value to non-volatile flash memory with the SAVE
command, and reset the card. At this time, Turbo PMAC will establish the new baud rate.
The possible settings of I54 and the baud rates they define are:
I54
Baud Rate
I54
Baud Rate
0
600
8
9600
1
900
9
14,400
2
1200
10
19,200
3
1800
11
28,800
4
2400
12
38,400
5
3600
13
57,600
6
4800
14
76,800
7
7200
15
115,200
Baud rates set by odd values of I54 are not exact unless the CPU is running at an exact multiple of 30
MHz (I52 = 2, 5, 8, 11, 14, 17, 20, 23). For most of these baud rates, the errors are small enough not to
matter. However, for 115,200 baud, the CPU must be running at an exact multiple of 30 MHz to establish
serial communications.
If the host computer baud rate cannot be made to match the Turbo PMAC’s baud rate, either the Turbo
PMAC's baud rate must be changed through the bus communications port, or the Turbo PMAC must be
re-initialized by resetting or powering up with the E51 jumper ON for Turbo PMAC, or the E3 jumper
ON for Turbo PMAC2. This forces the Turbo PMAC to the default baud rate of 38,400.
I55 DPRAM Background Variable Buffers Enable
Range: 0 to 1
Units: None
Default: 0 (disabled)
I55 enables or disables the dual-ported RAM (DPRAM) background variable read and write buffer
function. When I55 is 0, this function is disabled. When I55 is 1, this function is enabled. When
enabled, the user can specify up to 128 Turbo PMAC registers to be copied into DPRAM each
background cycle to be read by the host (background variable read) and up to 128 Turbo PMAC registers
to be copied each background cycle from values written into the DPRAM by the host (background
variable write).
I56 DPRAM ASCII Communications Interrupt Enable
Range: 0 to 1
Units: None
Default: 0 (disabled)
This parameter controls the interrupt feature for the dual-ported RAM (DPRAM) ASCII communications
function enabled by I58=1. When I56=1, PMAC will generate an interrupt to the host computer each