User's Manual

PMAC User Manual
122 Making Your Application Safe
Watchdog Timer
PMAC has an on-board dead-man (or watchdog) timer. This subsystem provides a fail-safe shutdown to
guard against software malfunction. To keep it from tripping the hardware circuit for the watchdog timer
requires that two basic conditions be met. First, it must see a DC voltage greater than 4.75V. If the
supply voltage is below this value, the circuit's relay will trip and the card will shut down. This prevents
corruption of registers due to insufficient voltage. The second necessary condition is that the timer must
see a square wave input (provided by the PMAC software) of a frequency greater than 25 Hz. In the
foreground, the Real Time Interrupt routine sets the signal and then the background routine resets it. If
the card, for whatever reason, due either to hardware or software problems, cannot set and clear this bit
repeatedly at this frequency or higher, the circuit's relay will trip and the card will shut down.
When the timer trips, line F2LD/ on the JPAN connector, and (if E28 is connected 2-3) line FEFCO/ on
the JMACH connector(s) are taken low, the DAC outputs are forced to zero, and the AENA lines are
forced to the disable state. In addition, a level 3 (IR3) interrupt is triggered on the PMAC PC's
Programmable Interrupt controller (PIC), and a level 5 (IR5) interrupt is triggered on the PMAC STD's
PIC. The red LED on the CPU section of the board is turned on.
It is important to shut down your power circuitry if the PMAC watchdog timer trips. The FEFCO/ output
on the JMACH1 connector is useful for this purpose. It is an open collector output referenced to AGND
that goes low (100 mA sinking capability) when the watchdog trips. It may also trip on the loss of +5V
power if the loss is slow enough that the watchdog trips from under voltage before complete shutdown.
This use must be evaluated on an individual system to see if it is reliable.
Once the watchdog timer has tripped, power to the PMAC must be cycled off and on, or the INIT/ line on
JPAN must be taken low, then high, to restore normal functioning.
Hardware Stop Command Inputs
PMAC has hardware inputs that can stop a move or a program with user-set decelerations. The Abort
input stops motion of all axes in the selected coordinate system(s), as determined by the motor/system
select inputs, starting immediately, and with each motor decelerating at a rate set by Ix15. The Hold input
performs the same function, except that the axes are decelerated at rates such that the desired multi-axis
path is maintained during deceleration.
These dedicated inputs are on the PMAC control panel connector (JPAN; J2). Which coordinate system
they act on is determined by the binary number produced by the four low-true input lines FPD0/ (LSBit),
FPD1/, FPD2/, and FPD3/ (MSBit). A value of zero (all high) disables the functions; values of 1 through
8 select the numbered coordinate system.
Host-Generated Stop Commands
These functions and several others also can be performed from the host with one- or two-character
commands. For instance, <CTRL-A> performs the same function as the Abort input with all coordinate
systems selected, and A aborts the software-addressed coordinate system. <CTRL-O> ho
lds all
coordinate systems, and H holds the software-addressed coordinate system. In addition, <CTRL-Q> stops
all programs at the end of the upcoming move, and Q stops the program of the software-addressed
coordinate system. <CTRL-K> disables all motors immediately, and K disables the software-addressed
motor (if the motor is in a coordinate system that is running a motion program, an Abort command should
be issued before the K command.
Any of these commands may be issued from within a PMAC program, using the COMMAND{command}
or the COMMAND^{letter} syntax. However, a motor-kill (K) command for a motor in the coordinate
system will be rejected automatically when issued from within a motion program running in that
coordinate system.