User's Manual

PMAC User Manual
Writing a Host Communications Program 249
Host Port Bus (PC/STDbus) Communications
Host Port Structure
The host port interface of PMAC, used for communications over the PC (ISA) and STD busses, occupies
11 consecutive addresses of a 16-address region in the I/O space of the host computer (it is not memory
mapped). On the host side, these registers are accessed with byte-write and byte-read commands, such as
outportb, inportb, outp, and inp. On the PMAC side, the PMAC firmware takes care of the direct access
to these registers, in response to commands from the host.
Base Address Selection
The location of the first of these 11 registers in the host computer's I/O space (the base address) is
selected by the settings of jumpers E91-E92, E66-E71 on the PMAC PC and PMAC Lite; by jumpers
W11 to W22 on the PMAC STD. Refer to the Jumper Descriptions section of the manual for actual
setting information. The addresses of these registers range from base address to base address +10.
Register Functions
Each of these 11 registers has a function for host communications, although only a few of them are used
commonly, and some are not used at all. The functions of the registers are:
Register Functions
Base Register Function
Base + 0: Interrupt Control Register
Base + 1: Command Vector Register
Base + 2: Interrupt Status Register
Base + 3: Interrupt Vector Register
Base + 4: (Unused)
Base + 5: High-Byte Data Transmit and Receive
Base + 6: Middle-Byte Data Transmit and Receive
Base + 7: Low-Byte Data Transmit and Receive
Base + 8: Interrupt Controller Command Word 0
Base + 9: Interrupt Controller Command Word 1
Base + 10: Interrupt Acknowledge Word
Registers for Simple Polled Communications
Basic polled communications can be accomplished with just two of these addresses. {Base + 7} holds
each byte (character) as it is passed to or from the PMAC. The read and write registers are separate, so do
not worry about overwriting a character sent in the other direction.
{Base + 2} holds the handshaking status bits; even though this is called the Interrupt Status Register, it
can be used for polled communications with the host: The Write-Ready Bit (bit 1) is true when PMAC is
ready to have the PC write it a character; and the Read-Ready Bit (bit 0) is true when PMAC is ready to
have the PC read a character.
Setting up the Port
No real setup is required for the host port, although it is advisable to write zero values to the high-byte
and middle-byte registers to clear them. The following sample C code segment does this:
outportb (combase + 5, 0); /* Clear high-byte register */
outportb (combase + 6, 0); /* Clear mid-btye register */
It is a good idea in the initial set up to compute a timeout value, related to the host computer's speed. As
the host polls PMAC to see if it is ready to communicate, a counter increments; if the counter exceeds the
timeout value, the host should give up on this attempt to talk to PMAC. Depending on the circumstances,
it should either just try again later (as when waiting for some asynchronous communications) or assume
there is an error condition. A good equation for the timeout value is:
100speed7timeout
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