Reference Manual

Turbo PMAC/PMAC2 Software Reference
Turbo PMAC Global I-Variables 228
The following settings may be used in timer mode:
 I7mn0 = 8: Timer counting up at SCLK/10
 I7mn0 = 9: Timer counting up at SCLK/10
 I7mn0 = 10: Timer counting up at SCLK/5
 I7mn0 = 11: Timer counting up at SCLK/2.5
 I7mn0 = 12: Timer counting down at SCLK/10
 I7mn0 = 13: Timer counting down at SCLK/10
 I7mn0 = 14: Timer counting down at SCLK/5
 I7mn0 = 15: Timer counting down at SCLK/2.5
These timers are useful particularly when the related capture and compare registers are utilized for precise
event marking and control, including triggered time base. The SLCK frequency is determined by the
crystal clock frequency and E34-E38.
I7mn1 Servo IC m Channel n Encoder Filter Disable
Range: 0 - 1
Units: None
Default: 0
I7mn1 controls whether the Encoder n on PMAC-style Servo IC m enables or disables its digital delay
filter. The possible settings of I7mn1 are:
 I7mn1 = 0: Encoder n digital delay filter enabled
 I7mn1 = 1: Encoder n digital delay filter disabled (bypassed)
The filter is a 3-stage digital delay filter with best-2-of-3 voting to help suppress noise spikes on the input
lines. It does introduce a small delay into the signal, which can be unacceptable if the motor is using
interpolated sub-count parallel data input, because of loss of synchronization between the quadrature and
parallel data signals.
Generally, the only people to disable this filter are those using the special interpolated parallel data
format. These people should disable the filters both on the encoder for their quadrature signals and the
encoder matching their parallel data input.
The sampling frequency for the filter is that of the SCLK signal, which is set by the master clock
frequency and jumpers E34-E38. The higher the frequency of SCLK, the higher the possible count rate,
but the narrower the pulse that can be filtered out. SCLK should be set to allow the maximum expected
encoder frequency, but no faster, in order to provide the maximum noise protection.
I7mn2 Servo IC m Channel n Capture Control
Range: 0 - 15
Units: none
Default: 1
I7mn2 determines which input signal or combination of signals for PMAC-style Servo IC m Channel n,
and which polarity, triggers a hardware position capture of the counter for Encoder n. If a flag input
(home, limit, or user) is used, I7mn3 determines which flag. Proper setup of this variable is essential for a
successful homing search move or other move-until-trigger for the Motor xx using Channel n for its
position-loop feedback and flags if the super-accurate hardware position capture function is used. If
Ixx97 is at its default value of 0 to select hardware capture and trigger, this variable must be set up
properly.
The following settings of I7mn2 may be used:
 I7mn2 = 0: Software control – armed
 I7mn2 = 1: Capture on Index (CHCn) high
 I7mn2 = 2: Capture on Flag n high