Reference Manual

Turbo PMAC/PMAC2 Software Reference
Turbo PMAC Memory and I/O Map 527
(Bits 0-7; from I91)
X:$070008 VME Active Base Address Bits A31-A24 (Bits 0-7; from I92)
X:$070009 VME Active Mailbox Base Address Bits A23-A16
ISA Active DPRAM Base Address bits A23-A16
(Bits 0-7; from I93)
X:$07000A VME Active Mailbox Base Address Bits A15-A08
ISA Active DPRAM Base Address bits A15-A14, Enable &
Bank Select
(Bits 0-7; from I94)
X:$07000B VME Active Interrupt Level (Bits 0-7; from I95)
X:$07000C VME Active Interrupt Vector (Bits 0-7; from I96)
X:$07000D VME Active DPRAM Base Address Bits A23-A20
(Bits 0-7; from I97)
X:$07000E VME Active DPRAM Enable State (Bits 0-7; from I98)
X:$07000F VME Active Address Width Control (Bits 0-7; from I99)
Y:$070000 VME Mailbox Register 0 (Bits 0-7)
Y:$070001 VME Mailbox Register 1 (Bits 0-7)
Y:$070002 VME Mailbox Register 2 (Bits 0-7)
Y:$070003 VME Mailbox Register 3 (Bits 0-7)
Y:$070004 VME Mailbox Register 4 (Bits 0-7)
Y:$070005 VME Mailbox Register 5 (Bits 0-7)
Y:$070006 VME Mailbox Register 6 (Bits 0-7)
Y:$070007 VME Mailbox Register 7 (Bits 0-7)
Y:$070008 VME Mailbox Register 8 (Bits 0-7)
Y:$070009 VME Mailbox Register 9 (Bits 0-7)
Y:$07000A VME Mailbox Register A (Bits 0-7)
Y:$07000B VME Mailbox Register B (Bits 0-7)
Y:$07000C VME Mailbox Register C (Bits 0-7)
Y:$07000D VME Mailbox Register D (Bits 0-7)
Y:$07000E VME Mailbox Register E (Bits 0-7)
Y:$07000F VME Mailbox Register F (Bits 0-7)
Turbo PMAC2 I/O Control Registers
Note:
These registers can be addressed either as X or Y registers)
PC/ISA Bus Turbo PMAC2 Versions (PMAC2 PC, PMAC2-Lite, PMAC2 PC UltraLite):
X/Y:$070800 I/O Buffer IC Direction Control
Bits: 0 OUT0: Buffer direction control for I/O00 to I/O07 on JIO
1 OUT1: Buffer direction control for I/O08 to I/O15 on JIO
2 OUT2: Buffer direction control for I/O16 to I/O23 on JIO
3 OUT3: Buffer direction control for I/O24 to I/O31 on JIO
4 OUT4: Buffer direction control for DAT0 to DAT7 on JTHW
5 OUT5: Buffer direction control for SEL0 to SEL7 on JTHW
6 OUT6: Buffer direction control for DISP0 to DISP7 on JDISP,
inverted as R/W- output on JDISP (pin 5)
7 OUT7: Inverted as E output on JDISP
16 ACC_FLT8: Channel 8 Accessory Fault
17 ACC_FLT7: Channel 7 Accessory Fault