Reference Manual

Turbo PMAC/PMAC2 Software Reference
Turbo PMAC Global I-Variables 151
Example: If Ixx81=$078D01 and Ixx91=$140000, Turbo PMAC would read 20 bits (bits 0 – 19) from
Y:$078D01.
Example: If Ixx81=$078C00 and Ixx91=$100004, Turbo PMAC would read 16 bits, with the low eight
bits from the low byte of Y:$078C00, and the high eight bits from the low byte of Y:$078C01.
Example: If Ixx81=$079E03 and Ixx91=$120005, Turbo PMAC would read 18 bits, with the low eight
bits from the middle byte of Y:$079E03, and the next eight bits from the middle byte of Y:$079E04, and
the high 2 bits from the first 2 bits of the middle byte of Y:$079E05.
MACRO R/D Read: If Ixx91 contains a value of $730000, Motor xx will read the absolute phase
position from an Acc-8D Option 7 Resolver-to-Digital Converter through a MACRO Station or
compatible device.
In this mode, Ixx81 specifies the MACRO node number. MACRO Station setup variable MI11x for the
matching node must be set to read the R/D converter.
MACRO Parallel Read: If Ixx91 contains a value of $740000, Motor xx will read the absolute phase
position from a parallel data source through a MACRO Station or compatible device.
In this mode, Ixx81 specifies the MACRO node number. MACRO Station setup variable MI11x for the
matching node must be set to read the parallel data source.
Hall Sensor Read: If Ixx91 contains a value from $800000 to $FF0000 (bit 23 set to 1), Motor xx will
read bits 20 through 22 of the Turbo PMAC memory or I/O register at the address specified by Ixx81. It
will expect these three bits to be encoded as the U, V, and W hall-effect commutation signals with 120
o
e
spacing for the absolute power-on phase position. In this mode, the address specified in Ixx81 is usually
that of a flag register.
Note:
Hall-style commutation sensors give only an approximate phase position, with a
+/-30
o
e error. Generally, it is necessary to correct the phase position value at a
known position such as the encoder’s index pulse, either using the SETPHASE
command or by writing directly into the phase position register (suggested M-
variable Mxx71).
If the flag register is in a PMAC-style Servo IC, the flag inputs for bits 20, 21, and 22, representing W, V,
and U, are +LIMn, -LIMn, and HMFLn, respectively. In a typical application, Ixx81 specifies that these
inputs be used from the “spare” flag register matching the second DAC channel used for commutation.
If the flag register is in a PMAC2-style Servo IC, the input flags for bits 20, 21, and 22, representing W,
V, and U, are CHWn, CHVn, and CHUn, respectively. In a typical application, these inputs are used
from the same flag register addressed by Ixx25 for the main flags.
In this mode, bit 22 of Ixx91 allows for reversal of the sense of the hall-effect sensors. If W (bit 20 of the
register; HMFLn or CHWn) leads V (bit 21; -LIMn or CHVn), and V leads U (bit 22; +LIMn or CHUn)
as the commutation cycle counts up, then bit 22 of Ixx91 should be set to 0. If U leads V and V leads W
as the commutation cycle counts up, then bit 22 of Ixx91 should be set to 1.
In this mode, bits 16 to 21 of Ixx91 together form an offset value from 0 to 63 representing the difference
between PMAC’s commutation cycle zero and the hall-effect sensor zero position, which is defined as the
transition of the V signal when U is low. This offset has units of 1/64 of a commutation cycle, or 5.625
o
e.
Typically, one of the transitions will be at PMAC’s commutation zero point, so the desired offset values
will be 0
o
, 60
o
, 120
o
, 180
o
, 240
o
, and 300
o
, approximated by values of 0, 11($0B), 21($15), 32($20),
43($2B), and 53($35).
This operation can handle hall-effect sensors separated by 120
o
e. The following table gives the Ixx91
settings for bits 16 to 23 for all of the common cases of hall-effect settings as they relate to the PMAC
commutation cycle.