User`s manual

78 digi.com Multitasking with Dynamic C
Figure 5-9 Type 2 ISR Nested Inside Type 3 ISR
As can be seen here, although the ISR for interrupt Z does not signal any tasks by posting to a semaphore,
mailbox, or queue, it must increment and decrement the interrupt nesting count since it re-enables inter-
rupts (ipres) prior to finishing all of its work.
5.10.2.3 General Layout of a TA-ISR
A TA-ISR is just like a standard ISR except that it does some extra checking and house-keeping. The fol-
lowing table summarizes when to use a TA-ISR.
Figure 5-10 shows the logical flow of a TA-ISR.
Table 5-2. Use of TA-ISR
µC/OS-II Application
Type 1
a
a. Type 1—Leaves interrupts disabled and does not signal task to ready state
Type 2
b
b. Type 2—Leaves interrupts disabled and signals task to ready state
Type 3
c
c. Type 3—Reenables interrupts before completion
TA-ISR Required? No Yes Yes
Task 2
Task 1
Interrupt Z TA-ISR
Nesting = 2
Task 1 is readied
Nesting = 1
ipres
Interrupt X TA-ISR
Nesting = 1
Do critical code
ipres
Interrupt X
Finish ISR
Nesting = 0
Interrupt Z