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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

ADCS7476

ADCS7477

ADCS7478

SNAS192G –APRIL 2003–REVISED MAY 2016

ADCS747x 1-MSPS, 12-Bit, 10-Bit, and 8-Bit A/D Converters

1 Features

• Variable Power Management

• Packaged in 6-Pin SOT-23

• Power Supply Used as Reference

• Single 2.7-V to 5.25-V Supply Operation

• Compatible With SPI™, QSPI™, MICROWIRE™,

and DSP

• Key Specifications

– Resolution With No Missing Codes (12-Bit, 10-

Bit, and 8-Bit)

– Conversion Rate: 1 MSPS

– DNL: 0.5, –0.3 LSB (Typical)

– INL: ±0.4 LSB (Typical)

– Power Consumption:

– 3-V Supply: 2 mW (Typical)

– 5-V Supply: 10 mW (Typical)

2 Applications

• Automotive Navigation

• FA or ATM Equipment

• Portable Systems

• Medical Instruments

• Mobile Communications

• Instrumentation and Control Systems

3 Description

The ADCS7476, ADCS7477, and ADCS7478 devices

are low power, monolithic CMOS 12-, 10-, and 8-bit

analog-to-digital converters that operate at 1 MSPS.

The ADCS747x devices are a drop-in replacement for

Analog Device's AD747x. Each device is based on a

successive approximation register architecture with

internal track-and-hold. The serial interface is

compatible with several standards, such as SPI,

QSPI, MICROWIRE, and many common DSP serial

interfaces.

The ADCS747x uses the supply voltage as a

reference, enabling the device to operate with a full-

scale input range of 0 to V

. The conversion rate is

determined from the serial clock (SCLK) speed.

These converters offer a shutdown mode, which can

be used to trade throughput for power consumption.

The ADCS747x is operated with a single supply that

can range from 2.7 V to 5.25 V. Normal power

consumption during continuous conversion, using a

3-V or 5-V supply, is 2 mW or 10 mW respectively.

The power-down feature, which is enabled by a chip

select (CS) pin, reduces the power consumption to

under 5 µW using a 5-V supply. All three converters

are available in a 6-pin SOT-23 package, which

provides an extremely small footprint for applications

where space is a critical consideration. These

products are designed for operation over the

automotive and extended industrial temperature

range of −40°C to 125°C.

Device Information

(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

ADCS7476

ADCS7477

ADCS7478

SOT-23 (6) 1.60 mm × 2.90 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Block Diagram

Summary of content (31 pages)

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Sample & Buy Product Folder Technical Documents Support & Community Tools & Software ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 ADCS747x 1-MSPS, 12-Bit, 10-Bit, and 8-Bit A/D Converters 1 Features 3 Description • • • • • The ADCS7476, ADCS7477, and ADCS7478 devices are low power, monolithic CMOS 12-, 10-, and 8-bit analog-to-digital converters that operate at 1 MSPS. The ADCS747x devices are a drop-in replacement for Analog Device's AD747x.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications.................................
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 5 Pin Configuration and Functions DBV Package 6-Pin SOT-23 Top View VDD 1 6 CS GND 2 5 SDATA VIN 3 4 SCLK Not to scale Pin Functions PIN NO. NAME TYPE (1) DESCRIPTION 1 VDD P Positive supply pin. These pins must be connected to a quiet 2.7-V to 5.25-V source and bypassed to GND with 0.1-µF and 1-µF monolithic capacitors placed within 1 cm of the power pin.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT Supply voltage, VDD –0.3 6.5 V Voltage on any analog pin to GND –0.3 VDD + 0.3 V Voltage on any digital pin to GND –0.3 6.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 6.5 Electrical Characteristics – ADCS7476 TA = 25°C, VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, and fSAMPLE = 1 MSPS (unless otherwise noted) (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CONVERTER CHARACTERISTICS Resolution with no missing codes INL Integral non-linearity VDD = 2.7 V to 3.6 V, –40°C ≤ TA ≤ 125°C VDD = 2.7 V to 3.6 V 12 TA = 25°C ±0.4 –40°C ≤ TA ≤ 85°C ±1 VDD = 2.7 V to 3.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com Electrical Characteristics – ADCS7476 (continued) TA = 25°C, VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, and fSAMPLE = 1 MSPS (unless otherwise noted)(1) PARAMETER VIH TEST CONDITIONS –40°C ≤ TA ≤ 85°C Input high voltage VIL Input low voltage IIN Input current CIND Digital input capacitance MIN TYP MAX 2.4 UNIT V VDD = 5 V, –40°C ≤ TA ≤ 85°C 0.8 V VDD = 3 V, –40°C ≤ TA ≤ 85°C 0.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 Electrical Characteristics – ADCS7477 (continued) TA = 25°C, VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, and fSAMPLE = 1 MSPS (unless otherwise noted)(1) PARAMETER IMD FPBW TEST CONDITIONS MIN TYP MAX UNIT Intermodulation distortion, second order terms fa = 103.5 kHz, fb = 113.5 kHz –78 dB Intermodulation distortion, third order terms fa = 103.5 kHz, fb = 113.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com Electrical Characteristics – ADCS7477 (continued) TA = 25°C, VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, and fSAMPLE = 1 MSPS (unless otherwise noted)(1) PARAMETER tAJ TEST CONDITIONS MIN Aperture jitter TYP MAX 30 UNIT ps 6.7 Electrical Characteristics – ADCS7478 TA = 25°C, VDD = 2.7 V to 5.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 Electrical Characteristics – ADCS7478 (continued) TA = 25°C, VDD = 2.7 V to 5.25 V, fSCLK = 20 MHz, and fSAMPLE = 1 MSPS (unless otherwise noted)(1) PARAMETER TEST CONDITIONS Power consumption, normal mode (operational) PD Power consumption, shutdown mode VDD = 5 V, fSAMPLE = 1 MSPS TA = 25°C VDD = 3 V, fSAMPLE = 1 MSPS TA = 25°C MIN TYP MAX UNIT 10 –40°C ≤ TA ≤ 85°C mW 17.5 2 –40°C ≤ TA ≤ 85°C mW 4.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com Timing Requirements (continued) –40°C ≤ TA ≤ 85°C, VDD = 2.7 V to 5.25 V, and fSCLK = 20 MHz (unless otherwise noted)(1) PARAMETER CONDITIONS t4 Data access time after SCLK falling edge (4) t5 SCLK low pulse width t6 SCLK high pulse width t7 SCLK to data valid hold time TYP MAX UNIT VDD = 2.7 V to 3.6 V 40 ns VDD = 4.75 V to 5.25 V 20 ns 0.4 × tSCLK ns 0.4 × tSCLK ns VDD = 2.7 V to 3.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 Figure 3. ADCS7477 Serial Interface Timing Diagram Figure 4.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com 6.9 Typical Characteristics TA = 25°C, VDD = 3 V, fSAMPLE = 1 MSPS, fSCLK = 20 MHz, and fIN = 100 kHz (unless otherwise noted) 12 Figure 5. ADCS7476 DNL Figure 6. ADCS7476 INL Figure 7. ADCS7476 Spectral Response at 100-kHz Input Figure 8. ADCS7476 THD vs Source Impedance Figure 9. ADCS7476 THD vs Input Frequency, 600 KSPS Figure 10.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 Typical Characteristics (continued) TA = 25°C, VDD = 3 V, fSAMPLE = 1 MSPS, fSCLK = 20 MHz, and fIN = 100 kHz (unless otherwise noted) Figure 11. ADCS7476 SINAD vs Input Frequency, 600 KSPS Figure 12. ADCS7476 SINAD vs Input Frequency, 1 MSPS Figure 13. ADCS7476 SNR vs fSCLK Figure 14. ADCS7476 SINAD vs fSCLK Figure 15. ADCS7477 DNL Figure 16.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com Typical Characteristics (continued) TA = 25°C, VDD = 3 V, fSAMPLE = 1 MSPS, fSCLK = 20 MHz, and fIN = 100 kHz (unless otherwise noted) 14 Figure 17. ADCS7477 Spectral Response at 100-kHz Input Figure 18. ADCS7477 SNR vs fSCLK Figure 19. ADCS7477 SINAD vs fSCLK Figure 20. ADCS7478 DNL Figure 21. ADCS7478 INL Figure 22.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 Typical Characteristics (continued) TA = 25°C, VDD = 3 V, fSAMPLE = 1 MSPS, fSCLK = 20 MHz, and fIN = 100 kHz (unless otherwise noted) Figure 23. ADCS7478 SNR vs fSCLK Copyright © 2003–2016, Texas Instruments Incorporated Figure 24.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com 7 Detailed Description 7.1 Overview The ADCS747x devices are successive-approximation analog-to-digital converters designed around a chargeredistribution digital-to-analog converter. Simplified schematics of the ADCS747x in both track and hold operation are shown in Figure 25 and Figure 26.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 7.4 Device Functional Modes Figure 25 shows the device in hold mode where the switch SW1 connects the sampling capacitor to ground, maintaining the sampled voltage, and switch SW2 unbalances the comparator. The control logic then instructs the charge-redistribution DAC to add or subtract fixed amounts of charge from the sampling capacitor until the comparator is balanced.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com Device Functional Modes (continued) Figure 27. ADCS7476/77 Ideal Transfer Characteristic Figure 28. ADCS7478 Ideal Transfer Characteristic 7.4.2 Power-Up Timing The ADCS747x typically requires 1 µs to power up, either after first applying VDD, or after returning to normal mode from shutdown mode. This corresponds to one dummy conversion for any SCLK frequency within the specifications in this document.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 Device Functional Modes (continued) 7.4.3 Modes of Operation The ADCS747x has two possible modes of operation: Normal Mode and Shutdown Mode. ADCS747x enters normal mode (and a conversion process is begun) when CS is pulled low. The device enters shutdown mode if CS is pulled high before the tenth falling edge of SCLK after CS is pulled low, or stays in normal mode if CS remains low.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com Device Functional Modes (continued) Figure 30. Entering Normal Mode To exit shutdown mode, bring CS back low. Upon bringing CS low, the ADCS747x begins powering up. Power up typically takes 1 µs. This microsecond of power-up delay results in the first conversion result being unusable. The second conversion performed after power-up, however, is valid, as shown in Figure 30.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com 8.2 Typical Application The ADCS747x are monolithic CMOS 12-, 10-, and 8-bit ADCs that use the supply voltage as a reference, enabling the devices to operate with a full-scale input range of 0 to VDD. An example low-power application with the LMT87, which is a wide range ±0.3°C accurate temperature sensor, is shown in Figure 32. VSUPPLY LP2950 1 µF 1 µF 0.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 Typical Application (continued) 8.2.3 Application Curves Figure 33. ADCS7476/77 Ideal Transfer Characteristic Figure 34.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com Power Management (continued) A plot of maximum power consumption versus throughput is shown in Figure 35. To calculate the power consumption for a given throughput, remember that each time the part exits shutdown mode and enters normal mode, one dummy conversion is required.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 10.2 Layout Example Figure 36.
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ADCS7476, ADCS7477, ADCS7478 SNAS192G – APRIL 2003 – REVISED MAY 2016 www.ti.com 11 Device and Documentation Support 11.1 Device Support 11.1.1 Device Nomenclature APERTURE DELAY is the variation in aperture delay from sample to sample. Aperture jitter manifests itself as noise in the output. APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. Aperture jitter manifests itself as noise in the output.
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ADCS7476, ADCS7477, ADCS7478 www.ti.com SNAS192G – APRIL 2003 – REVISED MAY 2016 Device Support (continued) TOTAL UNADJUSTED ERROR is the worst deviation found from the ideal transfer function. As such, it is a comprehensive specification which includes full scale error, linearity error, and offset error. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 4-Feb-2016 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.