Datasheet

1
1
2
2
3
3
4
4
D D
C C
B B
A A
Title
Engineer
Author
Date
Doc#
Circuit
Rev
Sheet#
Copyright
GMA
500-248
EG
3/4/2013
1
ZED
D.2
out of 17
Function
1
Cover Sheet
6
4
Sheet Number
5
3
'LJLOHQW
8
=HG%RDUG
2
7
FMC, AMS Connectors
PMODS, General I/O
Audio Codec
HDMI, VGA
Ethernet, OLED, SD Card
USB, UART
FPGA Configuration
FPGA Banks
9
DDR, MIO Banks
FPGA Power
USB Programming
DDR3 Memory 13
DDR Termination
Power Regulation
Power Regulation 16
Power Regulation
10
11
12
14
15
17
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0DU
3:33:55 PM
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