Specifications

5–26 EPSON
SED1225 Series
DC CHARACTERISTICS
Dynamic system:
Amp output
V
5 Ta = 25°C (during 1/4 bias)
4 ×
V
voltage VREG2
Reference
V
REG2
Ta = 25°C (during 1/4 bias) –1.55 –1.5 –1.45 V
voltage
Built-in
power supply
Frame frequency fFR Ta = 25°C, VSS = –3.0V 70 100 130 Hz *8
External clock
fCK 33.8 kHz *8, *9
frequency
Reset time tR 1.0 µs*6
Reset pulse width tRW 10 µs*6
Reset start time
tRES 50 ns *7
(VSS = –3.6 to –1.7 V, Ta = –30 to +85°C unless otherwise noted.)
Item Symbol Conditions Min. Typ. Max. Unit Pin
Power
Operable
1/4 bias –3.6 –3.0 –1.7
voltage
V
SS
1/5 bias –3.6 –3.0 –2.7
VV
SS
(1)
Data hold
–3.6 –1.5
voltage
Power
Operable V
5 –6.0 –3.0 V V5
voltage Operable V1, V2 0.5 × V5 VDD VV1, V2
(2)
Operable V
3, V4 V5 0.5 × V5 VV3, V4
"Hi" input voltage VIHC 0.2 × VSS VDD V*2
"Lo" input voltage VILC VSS 0.8 × VDD V*2
Input leakage current ILI VIN = VDD or VSS –1.0 1.0 µA*2
LCD driver R
ON Ta=25°C
V
5=–5.0V 10 20 kΩ
COM, SEG
ON resistance (LCD) ∆V=0.1V *3
LED driver R
ON VSS=–3.0V
100 Ω
XLE1, XLE2
ON resistance (LED) IOL=10mA
Static current
IDDQ 0.1 5.0 µAVDD
consumption
During V
5 = –5V; No loading
20 30 µAV
DD *4
display VSS=–1.8V
During V
5 = –5V; No loading
30 45 µAV
DD *4
Dynamic
display V
SS=–3.0V
current
I
DD
During OSC On; PWR off
10 15
µAV
DD
consump- standby No loading;VSS=–3.0V
tion
During OSC Off; PWR off
0.1 5
µAVDD
sleep No loading;VSS=–3.0V
During fcyc=200KHz
150 300 µAV
DD *5
access VSS=–3.0V
Input pin capacity C
IN Ta=25°C, f=1MHz 8.0 10.0 pF *3