Specifications

EPSON 2–13
SED1200 Series
SED1200
Series
OPERATION
Data Input/Output
Because the command codes are 8-bits wide and the
SED1200’s data bus is only 4-bits wide, the command
codes must be split into two nibbles (4-bits), which are
written separately.
The high-order nibble is written first, and is latched
internally by the SED1200. When the low-order nibble
is written, the eight bits of data are shifted into either the
Nibble High-order Low-order
Data Bus Bit D3 D2 D1 D0 D3 D2 D1 D0
Command Bit D7 D6 D5 D4 D3 D2 D1 D0
character registers or the command register, depending
on the level of A0 during the low-nibble write cycle.
When the busy flag is read, only one read cycle is
required.
New commands must not be written to the SED1200 if
the device is executing one currently, so the busy flag
should be checked before commands are written. It is not
necessary to check the busy flag between writes of the
upper and lower nibbles of commands. If the busy flag
is not going to be checked between writes of individual
commands then the MPU must wait long enough to allow
for command execution to complete. The maximum
time taken by the SED1200 to execute a command is 16/
Φ, where Φ is the system clock frequency.
System Initialization
Figure 1 is a flow chart of a possible SED1200 initialization
sequence. Note that busy flag checks, and busy/wait
loops have been omitted for the sake of brevity.
Power on
Select line
Clear display
Data RAM
Set CGRAM
address
Set CGRAM
data
End
of Set Data?
End of clear?
CGRAM set ?
NO
NO
NO
NO
NO
YES
YES
(Data entered 8 times)
SET CHARACTER CODE(ENTER 20H)
Execute any command
LCD display on/off
Set cursor address
Set cursor direction
Cursor font select
Cursor blink on/off
specified
Is cursor the
underline?
Cursor displayed?
Cursor on/off
1
YES
YES
YES
1
System reset
Figure 1. Initialization Flow Chart