Specifications

8–2 EPSON
SED1240 Series
BLOCK DIAGRAM
Input bufferMPU interface
IR register
(extended
register)
Address
counter
DDRAM
symbol
register
Refresh
address
counter
Timing
generating
circuit
Oscillating
circuit
Vertical
double-size
display
control
circuit
CGROM
CGRAM
Line scroll
control
circuit
Command
decoder
To each power
control circuit
Line/cursor
blink control
circuit
Static icon
drive circuit
SEG drive
circuit
COM drive
circuit
LCD power circuit
COMS A
SEGS A, B, C, D, E
F, G, H, I, j
COM 1 to 12 (24) [16]
COMS 1, 2
Note) In the COM terminal;
[ ]: 1/18 Duty
( ): 1/26 Duty
SEG 1 to 80
D0
D1
D2
D3
D4
D5
D6 (SCL)
D7 (SI)
IF
RES
CS
WR (E)
P/S
A0
C86
VS 1
CK
CAP 1+
CAP 1–
CAP2+
CAP2–
V
R
V OUT
V 1
V 2
V 3
V 4
V 5
V SS2