Specifications
8–54 EPSON
SED1240 Series
*1: The wide operating voltage range is guaranteed
except the case where a sudden voltage change
occurs during MPU access.
In the low-supply voltage data holding characteristic,
it is applied in the sleep mode and MPU access
cannot be guaranteed
*2: At triple boosting, take care about supply voltage
V
SS2 so that it may not exceed the V5 operating
voltage range.
*3: D0 to D5, D6 (SCL), D7 (SI), A0, RES, CS, WR (E),
P/S, IF. C86. CK
*4: This is a resistance value when a voltage of 0.1 V is
applied between output pins SEGn, SEGSn, COMn,
and COMSn, and each power pin (V
1, V2, V3, V4).
This is specified within the range of operating
voltage (2).
R
ON = 0.1 V / ∆I
(∆I: A current flowing when 0.1 V is
applied between the power supply and
the output)
*5: Applies under the following conditions:
• No access from MPU during all characters ‘H’
display
• The built-in circuit and oscillating circuit are
operating.
• CGRAM unused, HPM = 0 specified, V
SS = -3.0
*6: Applies under the following conditions:
• Standby mode
• ALl the built-in power circuit off
• Display off
• Oscillating circuit on
*7: Indicates that fcyc is used for writing at all times.
The current consumption during access is
approximately proportional to the access frequency
(fcyc).
*8: Specifies the RES signal minimum pulse width. To
perform resetting, it is necessary to input the pulse
having a width of
tRW or more. Original, the method
for reset case 1 is used, but the method for reset case
2 can also be used if the reset start time condition of
tRES or less is satisfied.
*9: The boosting circuit performs boosting, using voltage
between the V
DD and VSS2 as source voltage. Check
the V
SS2 input voltage to ensure that it does not
exceed V
OUT absolute maximum rating, or the
operating voltage range of the VSS system (VSS) and
V
5 system (V5).
*10:Frequency
fOSC of the internal circuit drive
oscillating circuit and boosting clock fBST vary
according to the type. The following shows the
relationship between the oscillating circuit
fOSC and
boosting clock f BST:
•
fOSC = (number of digits) × (1/duty) × fFR
• fBST = (1/2) × (1/number of digits) × fOSC
*11:Enter the following input when performing
operations by the external clock, without using the
built-in oscillating circuit:
• Duty = (
th/tOSC) × 100 = 20 to 30%
•
fOSC = 1/tOSC
V
DD
RES
Power
supply
V
SS
V
DD
V
SS
V
DD
t
RW
t
RES
t
RW
V
SS
V
DD
RES
Power
supply
Reset case 2
Reset case 1
t
OSC
t
h
*12:Adjust the V5 voltage regulating circuit within the
voltage follower operating voltage range.
* All timing are specified on the basis of 20% and 80% of V
SS.