Specifications

9–2 EPSON
SED1278
BLOCK DIAGRAM
DB 0
to
DB 7
E
R/W
RS
V
SS
V DC
V 1
V 2
V 3
V 4
V 5
COM 1 to
COM 16
SEG 1 to
SEG 40
XSCL
LP
FR
DO
OSC1 OSC2
8
55
5
7
7
I/O BufferI/O Control
Instruction Decoder Cursor/ Printer Control
Instruction Register
Daia Register
M P X
M P X
M P X
Character Generator
RAM
(CGRAM)
64 Bits
Character Generator
RAM
(CGROM)
5 x 10 x 240 Bits
Display Data RAM
DDRAM
80 Bytes
Parallel/Serial
Data Converter
Address
Counter ACC
Refresh Address Counter
Timing Generator
Shift Register 16 Bits
Common Driving
Output Circuit
Segment Driving
Output Circuit
Latch Circuit
40 Bits
Shift Register
40 Bits
Oscillation
Circuit
PACKAGE OUTLINE
65
40
80
25
4164
241