Specifications

4–16 EPSON
SED1220
Voltage Tripler Circuit
If capacitors are connected between CAP+1 – CAP–1
and CAP2+,CAP2– and VSS VOUT, VDD– VSS potential
is negatively tripled and generated at VOUT terminal.
When the voltage is boosted double, open CAP2+ and
connect CAP2– to V
OUT terminal.
At this time, the oscillating circuit must be operating
since the amplifying circuit utilize the signal from the
oscillation output.
V DD =0V
V
S1 -2V
V
OUT =V S1 =-4V
V
DD =0V
V
S1 -2V
V
OUT =3V S1 -6V
Potential relationship of amplified voltage
=
=
=
Where, VREG is the constant power supply within IC.
V
REG is maintained constantly at VREG 2.0V.
Voltage regulation of V
5 output is done by connecting to
a variable register between VR, VDD and V5. It is
recommended to combine fixed registers R1 and R3 with
variable resistor R2 for fine adjustment of V
5 voltage.
[Sample setting on R1, R2 and R3]
• R1 + R2 + R3 = 1.2 M ohm (decided from the current
value I
05 passed between VDD – V5. Where, I05≤5 µA
is supposed).
• Variable voltage range provided by R2 is from –4V to
–6V (to be decided considering charecteristics of the
liquid crystal).
• Since V
REG = 2.0V, if the electronic volume register is
set at (0, 0, 0, 0, 0), followings are derived from above
conditions and expression
1
:
R1 = 400KΩ
R2 = 200KΩ
R3 = 600KΩ
The voltage regulation circuit outputs V
REG with the
temperature gradient of approximately –0.04%/°C.
Since V
R terminal has high input impedance, anti-noise
measures must be considered including use of shortened
wiring distance and shield wire.
Voltage regulating circuit
Amplified voltage generated at V
OUT outputs liquid crystal drive voltage V5 through the voltage regulation circuit.V5
voltage can be obtained from the expression
1
below by adjusting the resistors Ra and Rb within the range of
V5<VOUT.calculated by the following formula:
V
5
= (1 +
R
b
) • V
REG
..............................
1
Ra
R1
Ra
R2
VR
V0
VDD
VREG
R3
Rb
+
-
V
5
•
=
•