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FOD3180 — 2A Output Current, High Speed MOSFET Gate Driver Optocoupler

FOD3180 Rev. 1.0.6

August 2008

FOD3180

2A Output Current, High Speed MOSFET Gate Driver

Optocoupler

Features

■

Guaranteed operating temperature range of -40°C to

+100°C

■

2A minimum peak output current

■

High speed response: 200ns max propagation delay

over temperature range

■

250kHz maximum switching speed

■

30ns typ pulse width distortion

■

Wide V

operating range: 10V to 20V

■

5000Vrms, 1 minute isolation

■

Under voltage lockout protection (UVLO) with

hysteresis

■

Minimum creepage distance of 7.0mm

■

Minimum clearance distance of 7.0mm

■

C-UL, UL and VDE* approved

■

DS(ON)

of 1.5

Ω

(typ.) offers lower power dissipation

■

15kV/µs minimum common mode rejection

Applications

■

Plasma Display Panel

■

High performance DC/DC convertor

■

High performance switch mode power supply

■

High performance uninterruptible power supply

■

Isolated Power MOSFET gate drive

*Requires ‘V’ ordering option

Description

The FOD3180 is a 2A Output Current, High Speed

MOSFET Gate Drive Optocoupler. It consists of a

aluminium gallium arsenide (AlGaAs) light emitting diode

optically coupled to a CMOS detector with PMOS and

NMOS output power transistors integrated circuit power

stage. It is ideally suited for high frequency driving of

power MOSFETs used in Plasma Display Panels

(PDPs), motor control inverter applications and high

performance DC/DC converters.

The device is packaged in an 8-pin dual in-line housing

compatible with 260°C reflow processes for lead free

solder compliance.

Functional Block Diagram Package Outlines

FOD3180

NO CONNECTION

ANODE

CATHODE

NO CONNECTION

VCC

OUTPUT

VEE

Note:

A 0.1µF bypass capacitor must be connected between pins 5 and 8.

Summary of content (13 pages)

PAGE 1
FOD3180 2A Output Current, High Speed MOSFET Gate Driver Optocoupler Features Description ■ Guaranteed operating temperature range of -40°C to The FOD3180 is a 2A Output Current, High Speed MOSFET Gate Drive Optocoupler. It consists of a aluminium gallium arsenide (AlGaAs) light emitting diode optically coupled to a CMOS detector with PMOS and NMOS output power transistors integrated circuit power stage.
PAGE 2
Symbol Parameter Value Units TSTG Storage Temperature -40 to +125 °C TOPR Operating Temperature -40 to +100 °C Junction Temperature -40 to +125 °C TJ 260 for 10 sec. °C IF(AVG) Average Input Current(1) 25 mA IF(tr, tf) LED Current Minimum Rate of Rise/Fall 250 ns IF(TRAN) Peak Transient Input Current (<1µs pulse width, 300pps) 1.0 A TSOL VR Lead Solder Temperature Reverse Input Voltage 5 V IOH(PEAK) “High” Peak Output Current(2) 2.
PAGE 3
Over recommended operating conditions unless otherwise specified. Symbol Parameter IOH High Level Output Current(2)(3) IOL Current(2)(3) Low Level Output Output Voltage(6)(7) Test Conditions Min. VOH = (VCC – VEE – 1V) 0.5 VOH = (VCC – VEE – 3V) 2.0 VOL = (VCC – VEE – 1V) 0.5 VOL = (VCC – VEE – 3V) 2.0 Max.
PAGE 4
Over recommended operating conditions unless otherwise specified. Symbol Parameter Test Conditions Min. tPLH Propagation Delay Time to High Output Level(8) tPHL Propagation Delay Time to Low Output Level(8) IF = 10mA, Rg = 10Ω, f = 250kHz, Duty Cycle = 50%, Cg = 10nF PWD Pulse Width Distortion(9) Propagation Delay Difference Between Any PDD (tPHL – tPLH) Two Parts(10) tr Rise Time tf Fall Time tUVLO ON UVLO Turn On Delay tUVLO OFF UVLO Turn Off Delay Typ.* Max.
PAGE 5
7. 8. Maximum pulse width = 1ms, maximum duty cycle = 20%. tPHL propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the falling edge of the VO signal. tPLH propagation delay is measured from the 50% level on the rising edge of the input pulse to the 50% level of the rising edge of the VO signal. 9. PWD is defined as | tPHL – tPLH | for any given device. 10.
PAGE 6
Fig. 2 Low To High Input Current Threshold vs. Ambient Temperature Fig. 1 Input Forward Current vs. Forward Voltage 6 IFLH – LOW TO HIGH INPUT CURRENT THRESHOLD (mA) I F – FORWARD CURRENT (mA) 100 10 TA = -40°C TA = 100°C 1 TA = 25°C 0.1 0.01 V = 10 to 20V CC VEE = 0 Output = Open 5 4 3 2 1 0 0.001 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -40 2.2 -20 Fig. 3 Output Low Voltage vs.
PAGE 7
Fig. 8 Propagation Delay vs. Forward LED Current Fig. 7 Propagation Delay vs. Load Capacitance 200 200 VCC = 20V, VEE = 0 RG = 10Ω, CG = 10nF f = 250 kHz, D. Cycle = 50% TA = 25oC VCC = 20V, VEE = 0 IF = 10mA, TA = 25oC RG = 10Ω, CG = 10nF f = 250 kHz, D. Cycle = 50% t P – PROPAGATION DELAY (ns) t P – PROPAGATION DELAY (ns) 180 160 tPHL 140 120 tPLH 100 80 180 160 tPHL 140 120 tPLH 100 80 60 60 5 10 15 20 25 6 8 CG – LOAD CAPACITANCE (nF) 12 14 16 Fig. 10 Propagation Delay vs.
PAGE 8
Through Hole 0.4" Lead Spacing PIN 1 ID. 4 3 2 PIN 1 ID. 1 4 3 2 1 0.270 (6.86) 0.250 (6.35) 5 6 7 0.270 (6.86) 0.250 (6.35) 8 5 6 0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN 0.200 (5.08) 0.140 (3.55) 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 7 8 0.390 (9.91) 0.370 (9.40) SEATING PLANE SEATING PLANE 0.390 (9.91) 0.370 (9.40) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP 0.070 (1.78) 0.045 (1.14) 0.004 (0.10) MIN 0.200 (5.08) 0.140 (3.55) 15° MAX 0.154 (3.90) 0.120 (3.
PAGE 9
Option Order Entry Identifier (Example) No option FOD3180 S FOD3180S SD FOD3180SD T FOD3180T 0.4" Lead Spacing V FOD3180V VDE 0884 TV FOD3180TV VDE 0884, 0.
PAGE 10
D0 P0 t K0 P2 E F A0 W1 d t P User Direction of Feed Symbol W W B0 Description D1 Dimension in mm Tape Width 16.0 ± 0.3 Tape Thickness 0.30 ± 0.05 P0 Sprocket Hole Pitch 4.0 ± 0.1 D0 Sprocket Hole Diameter 1.55 ± 0.05 E Sprocket Hole Location 1.75 ± 0.10 F Pocket Location 7.5 ± 0.1 4.0 ± 0.1 P2 P Pocket Pitch A0 Pocket Dimensions 12.0 ± 0.1 10.30 ±0.20 B0 10.30 ±0.20 K0 4.90 ±0.20 W1 d R ©2005 Fairchild Semiconductor Corporation FOD3180 Rev. 1.0.
PAGE 11
245 C, 10–30 s Temperature (°C) 300 260 C peak 250 200 150 Time above 183C, <160 sec 100 50 Ramp up = 2–10C/sec 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time (Minute) • Peak reflow temperature: 260 C (package surface temperature) • Time of temperature higher than 183 C for 160 seconds or less • One time soldering reflow is recommended Output Power Derating The maximum package power dissipation is 295mW.
PAGE 12
Figure 14 illustrates the relationship of the LED input drive current and the device’s output voltage and sourcing and sinking currents. The 0.03µF capacitor load represents the gate to source capacitance of a very large power MOSFET transistor. A single supply voltage of 20V is used in the evaluation. This device is tested and specified when driving a complex reactive load. The load consists of a capacitor in the series with a current limiting resistor.
PAGE 13
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