Computer Hardware User Manual

3 V7865 Product Manual

VME Bridge

In addition to its PC/AT functions, the V7865 has the following VME features:

The Tundra Tsi148 allows VME to run at a bandwidth of up to 320MB/s along the full

length of a 21-slot backplane. This increases the performance in the following ways:

• 2eSST VME transfers

• 8x faster than the 40MB/s transfer rate of VME64

• 3x faster than a multi-domain, 64-bit/66MHz CompactPCI bus

• Broadcast Mode support for sending data to multiple cards at one time

Other standard features include:

• Legacy protocol support

• User-configured interrupter

• User-configured interrupt handler

• Full VME system controller functionality

• Two programmable DMA controllers

• System Controller auto detection

The V7865 VME interface is based on the high performance PCIX-to-VME interface

from the Tundra Tsi148. Providing a 64-bit bus width capable of operating at

100MHz, the Tundra Tsi148 uses PCI-X version 2.0 mode 1. Tsi148 is fully compliant

with both 2eSST and VME64 Extension standards.

The functions and programming of the Tsi148-based VME interface are addressed in

detail in the Tsi148 PCI/X-to-VME Bus Bridge User Manual.

PCI-X To VME Bridge (Tsi148) Software Guidelines

Programmers writing code or using GE Fanuc Embedded Systems Board Support

Packages for the Tsi148 Bridge as used on the V7865 Single board Computer, must be

aware of requirements of the Tsi148 based PCI-X to VME architecture.

The V7865 PCI-X to VME Interface uses the Tundra Tsi148 2eSST Bridge. This

architecture interfaces the VME to the onboard SBC PCI-X bus. In doing so, the user

must be aware of the following guidelines as related to Software programming of the

Tsi148:

Shared V7865 Memory: Any V7865 DRAM memory made available to another VME

master through the Tsi148 is subject to dead lock that may cause a VME bus error

unless specific precautions are taken. If onboard DRAM memory is slaved to the

VME, and a program on the V7865 with slaved memory attempts to write (from the

processor) to the VME through the Tsi148, then the user must first request ownership

of the VME through the Device Wants Bus (DWB) Bit in the Tsi148, and be granted the