Datasheet

Dual-Core Intel® Xeon® Processor 5000 Series Datasheet 87

Features

Note: Not all Dual-Core Intel Xeon Processor 5000 series are capable of supporting Enhanced

Intel SpeedStep Technology. More details on which processor frequencies will support

this feature will be provided in future releases of the Dual-Core Intel

Xeon

Processor

5000 Series Specification Update when available.

Enhanced Intel SpeedStep Technology creates processor performance states (P-states)

or voltage/frequency operating points. P-states are lower power capability states within

the Normal state as shown in Figure 7-1. Enhanced Intel SpeedStep Technology

enables real-time dynamic switching between frequency and voltage points. It alters

the performance of the processor by changing the bus to core frequency ratio and

voltage. This allows the processor to run at different core frequencies and voltages to

best serve the performance and power requirements of the processor and system. The

Dual-Core Intel Xeon Processor 5000 series have hardware logic that coordinates the

requested processor voltage between the processor cores. The highest voltage that is

requested for either of the processor cores is selected for that processor. Note that the

front side bus is not altered; only the internal core frequency is changed. In order to

run at reduced power consumption, the voltage is altered in step with the bus ratio.

The following are key features of Enhanced Intel SpeedStep Technology:

• Multiple voltage/frequency operating points provide optimal performance at

reduced power consumption.

• Voltage/frequency selection is software controlled by writing to processor MSR’s

(Model Specific Registers), thus eliminating chipset dependency.

— If the target frequency is higher than the current frequency, V

is incremented

in steps (+12.5 mV) by placing a new value on the VID signals and the

processor shifts to the new frequency. Note that the top frequency for the

processor can not be exceeded.

— If the target frequency is lower than the current frequency, the processor shifts

to the new frequency and V

is then decremented in steps (-12.5 mV) by

changing the target VID through the VID signals.