HP Compilers for HP Integrity Servers (September 2011)

compiler to trigger execution of a recovery code sequence when an address conflict is
discovered during runtime. The compiler utilizes the advanced check (chk.a) instruction
that checks to see if there have been any conflicting writes to the address accessed by
the advanced load. If such a conflict occurs, the advanced check branches to
compiler-generated recovery code where the load is re-executed to ensure the correct
value.
Example 7 Generated code for Example 6 using data speculation
ld.a t1 = [q] ;;
add b = t1,2
st [p] = a
chk.a t1, L2
L1:
...
L2: ld t1 = [q] ;;
add b = t1,2
br L1
The load of *q is moved ahead of the store of *p. The chk.a checks for conflicting
writes to the location whose contents were loaded into t1, and branches to L2 to correct
them.
Explicit parallelism
Explicit parallelism allows the compiler to take advantage of its knowledge of the program
semantics, combined with a model of the processor resources, to generate groups of
instructions that can be executed in parallel (without requiring hardware dependency
analysis). Current processors can execute up to 6 instructions per cycle (2 bundles of 3
instructions each). Supported by a large register file and multiple execution units, the
compilers are able to schedule multiple computations in parallel. With explicit “stop bits”
in the instruction stream, the compilers indicate exactly which groups of instructions may
be executed in the same cycle. The compilers optimize the code to maximize the number
of parallel computations performed in each cycle, using the techniques of predication,
speculation, and modulo scheduling of loops to increase the opportunities for
parallelization.
Optimizing for Integrity servers 9