HP-UX Virtual Partitions Administrator's Guide (includes A.03.05 and A.04.05)

• For more information on using the -R and -r options of the shutdown and reboot
commands used in a Reboot for Reconfiguration, see “shutdown and reboot commands”
(page 26).
• For more information, see “Shutting Down or Rebooting the nPartition (OR Rebooting the
vPars Monitor)” (page 152) and the vPars Monitor command “reboot [mode]” (page 129).
Setting Hyperthreading (HT ON/OFF) and cpuconfig Primer
This section describes how to set HT ON/OFF for the latest dual-core processors which offer this
feature.
For complete information on hyperthreading and cpuconfig, see the document nPartition
Administrator's Guide.
NOTE: vPars and HT ON/OFF
• HT ON/OFF should be set using the EFI shell’s cpuconfig command. An alternative method
is to use the vPar Monitor’s threads command. Using setboot from within a vPars
environment is not supported.
• Although hyperthreading is supported within vPars, CPU assignments to virtual partitions
remain on a per core basis and not on a logical CPU (LCPU) basis.
• HT ON is not supported in a mixed HP-UX 11i v2/v3 vPars environment.
vPars Monitor
• to show the current HT state of the CPUs threads without any options will show the
current state of HT ON/OFF (in other words, whether hyperthreads are turned on or off):
MON> threads
HyperThreading is currently OFF
HyperThreading will be OFF after the next nPar reboot
• to turn HT ON after the next nPar reboot:
MON> threads on
HyperThreading is now set to be ON after the next reboot
MON> threads
HyperThreading is currently OFF
HyperThreading will be ON after the next nPar reboot
• to turn HT OFF after the next nPar reboot:
MON> threads off
HyperThreading is now set to be OFF after the next reboot.
cpuconfig
• to show the current state of the CPUs, including HT ON/OFF cpuconfig without any
options will show the current state of HT ON/OFF (in other words, whether hyperthreads
are turned on or off):
Shell> cpuconfig
PROCESSOR MODULE INFORMATION
Cab/
Cell
Slot/ # of L3 L4 Family/
CPU Logical Cache Cache Model Processor
Cell Module CPUs Speed Size Size (hex.) Rev State
---- ------ ------- -------- ------ ------ ------- --- -------------
1 0/1/0 2 1.4 GHz 6 MB None 20/00 C0 Active
260 nPartition Operations