HP-UX HB v13.00 Ch-11 - Software Development

HP-UX Handbook Rev 13.00 Page 49 (of 101)
Chapter 11 Software Development
October 29, 2013
make(1)
As described in the Build Process, applications can consist of multiple executables and shared
libraries. Each of them normally is built from multiple objects, and each object is built from
multiple header and source files. If source files have changed, you could either rebuild the whole
application, which could take very long, or you could just recompile and relink those parts that
depend on the changed sources, thus saving a lot of time.
make(1) is designed to manage these dependencies. It compares existence and timestamps of
files to determine which parts need to be rebuilt. The developer must create a so called makefile,
which usually consists of macros and rules. Macros are used to set paths, command line options,
file lists etc. that are used multiple times, and rules describe how to build files from others. The
basic syntax of such a rule is as follows:
target: dependents
commands
The target is the name of the file that is created by this rule. The dependents name all files that
are required to build the target, and the commands are executed to build the target.
When processing a rule, make(1) checks if any dependents need to be built first. Therefore it
looks for rules that have the dependents as targets and processes them recursively in a depth
first algorithm. If there is no rule and the file exists it is treated as up to date. If there is no rule
and the file does not exist, make(1) reports an error and stops. If one of the dependents is newer
than the target, or if the target doesn't exist, the target is built by executing the commands. On
the other hand, if all dependents are up to date and older than the target, make(1) assumes the
existing target was already built from the current dependents and decides that there’s no need to
rebuild it.
If the makefile is called [M|m]akefile, make(1) can be called without arguments, otherwise the
name of the makefile must be specified with the -f option:
make -f <makefile name> [ <target> ]
If <target> is omitted, the target specified in the first rule of the makefile is built. Otherwise the
given target is built.
Consider the following example dependency tree of a C program:
myprog -> obj_a.o -> mydefs.h
-> obj_a.c