HP Caliper 5.3 User Guide (5900-1558, February 2011)

• Function
• Statement
• Cache line
Table 28 Information in itlb Measurement Reports
DescriptionColumn
Percent of the total for <metric> attributable to a given program object. The <metric> is the same
as the <metric> HP Caliper uses for sorting, except when the sort metric is address, in which
case sampled misses is used.
% Total <metric>
Running sum of the percent of total for <metric> accounted for by the given program object and
those listed above it.
Cumulat % of Total
Total number of sampled instruction TLB misses attributed to the given program object.Sampled ITLB
Misses
Number of sampled instruction TLB misses that hit the L2 instruction TLB for the given program
object. L2 fills are not reported for, and do not apply to, Itanium systems.
ITLB L2 Fills
Number of sampled instruction TLB misses that were handled by the HPW for the given program
object.
ITLB HPW Fills
Number of sampled instruction TLB misses that were handled by software for the given program
object.
ITLB Soft Fills
Percent of sampled instruction TLB misses that hit the L2 instruction TLB for the given program object.
L2 fills are not reported for, and do not apply to, Itanium systems.
% ITLB L2 Fill
Percent of sampled instruction TLB misses that were handled by the HPW for the given program
object.
% ITLB HPW Fill
Percent of sampled instruction TLB misses that were handled by software for the given program
object.
% ITLB Soft Fill
Kernel Thread ID suffixed with the the name of the routine that the thread will execute once it is
created.
Kernel Thread
Identification
Number.
Shared library or the main executable.Load Module
Routine from your application.Function
Source file associated with a function.File
The column contains one of these:
• A source-code line number for rows showing statements
• An instruction slot number for rows showing instructions not on a bundle boundary
• A source-code column number followed by an offset from the beginning address of a function
for rows showing instructions on a bundle boundary
Column and line numbers are preceded by “~” when they are approximate due to optimization.
Line |
Slot |
Col,Offset
The column contains either a source statement, preceded by “>”, or a disassembled instruction.
Statements that are out of order due to optimization are preceded by “*>”.
>Statement |
Instruction
Function Details
A cache line is the smallest unit of data that is transferred at one time between main memory and
the instruction cache. On Itanium 2 systems, cache lines are 64 bytes (12 instructions). Cache lines
are the finest level of granularity available in itlb measurement reports
These reports show data associated with a cache line on the same row as the first instruction of
the cache line. Each set of instructions that make up a cache line are preceded and followed by
a row of dashes (“- - - -”). The cache lines shown might not be contiguous.
210 Descriptions of Measurement Reports