HP Caliper 5.3 User Guide (5900-1558, February 2011)

Glossary
advance load
address table
(ALAT)
In the Integrity servers processor family, a table that keeps track of speculative (that is, advance)
loads. An excessive number of ALAT compares that result in a failed advance load (an ALAT
miss) can seriously degrade performance.
advice class A grouping for advice from the Advisor. Every piece of advice belongs to one of these classes:
general, CPU, memory, IO, and system.
alat measurement A measurement, provided by the alat measurement configuration file, that measures and reports
advance load address table (ALAT) misses.
alat_miss
measurement
The non-preferred name for the alat measurement. This name was used in releases prior to
Release 3.9.
branch
measurement
A measurement, provided by the branch measurement configuration file, that measures and
reports branch mispredictions.
branch trace buffer
(BTB)/execution
trace buffer (ETB)
In the Integrity servers processor, a buffer that provides information about the outcome of the
most recent branch instructions and their predictions and outcomes. On dual-core Integrity and
Itanium 9300 quad-core processors, the BTB is called the execution trace buffer (ETB). The BTB
is four entries deep, and the ETB is 16 entries deep.
branch_prediction
measurement
The non-preferred name for the branch measurement. This name was used in releases prior to
Release 3.9.
bus request queue
(BRQ)
In the Integrity servers processor family, a centralized queueing structure that collects almost all
requests from the L1 cache and then schedules those requests to the L2 cache or front side bus
(FSB).
cache line The smallest unit of data that is transferred at one time between main memory and the instruction
cache. On Integrity servers systems, cache lines are 64 bytes (12 instructions). See “icache
Measurement Report Description” (p. 204).
central electronics
complex (CEC)
The central processing unit, including the power unit, service units, and console.
cgprof
measurement
A measurement, provided by the cgprof measurement configuration file, that measures and
reports a call graph profile, produced by instrumenting the application code.
collection
specification
In the HP Caliper GUI, all the information used to make a measurement.
configuration file See measurement configuration file.
control speculation The execution of an operation before the branch that guards it. See “cspec Event Set” (p. 226).
CPU counter In the Integrity servers processor family, a hardware element that monitors CPU processing events.
Also known as performance counter or PMU counter.
cpu measurement A measurement, provided by the cpu measurement configuration file, that measures and reports
per-process metrics based on sampled CPU events.
cpu_metrics
measurement
The non-preferred name for the cpu measurement. This name was used in releases prior to Release
3.9.
cstack
measurement
A measurement, provided by the cstack measurement configuration file, that measures and
reports a sampled call stack profile, produced by periodically sampling the application program
counter and each of its thread's call stacks.
cycles
measurement
A measurement, provided by the cycles measurement configuration file, that measures and
reports a flat profile of the instruction pointers (IPs).
data cache miss A failure that occurs when a request for data is made and the data cache does not have the data
in residence at the time of the request. The opposite of a data cache hit, which occurs when the
request can be satisfied.
data event address
register (D-EAR)
The component of the Integrity servers processor that records the data addresses of data cache
misses for loads and the data addresses of data TLB misses.
See also instruction event address register (I-EAR).
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